Adaptive Debug and Diagnosis without Fault Dictionaries

Holst, Stefan; Wunderlich, Hans-Joachim

doi:10.1109/ets.2008.40

Cited by 18 publications

(9 citation statements)

References 26 publications

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“…Lastly, it shows experimental results to establish that Multi-Vdd diagnosis is more effective for resistive bridges than for hardshorts. Our future work includes integrating other real defects using their respective advanced fault models, and utilizing recently reported approaches [8], [9] to make it a more robust diagnostic suite. Furthermore, in deep submicron technology process variation has increased impact on effectiveness of test quality, therefore its impact on diagnosis accuracy will also be investigated.…”

Section: Discussionmentioning

confidence: 99%

Diagnosis of Multiple-Voltage Design With Bridge Defect

Khursheed

Al-Hashimi

Reddy

et al. 2009

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-Multiple-voltage is an effective dynamic power reduction design technique, commonly used in low power ICs. To the best of our knowledge there is no reported work for diagnosing multiple-voltage enabled ICs and the aim of this paper is to propose a method for diagnosing bridge defects in such ICs. Using synthesized ISCAS benchmarks, with realistic extracted bridges and a parametric fault model, the paper investigates the impact of varying supply voltage on the accuracy of diagnosis and demonstrates how the additional voltage settings can be leveraged to improve the diagnosis resolution through a novel multi-voltage diagnosis algorithm. In addition it also identifies the most useful voltage settings to reduce diagnosis cost by eliminating tests at certain voltage setting using the proposed multi-voltage diagnosis approach thereby achieving high diagnosis accuracy at reduced cost.

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Section: Discussionmentioning

confidence: 99%

Diagnosis of Multiple-Voltage Design With Bridge Defect

Khursheed

Al-Hashimi

Reddy

et al. 2009

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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“…It is a modification of the fault model independent method of [37], in order to handle extremely short signatures. The faulty signatures, which were downloaded from the DUD, can easily be adapted to form a similar signature S obs by simply inserting the correct XP-SISR signatures for those test patterns, which did not fail.…”

Section: B Logic Diagnosis For Bisdmentioning

confidence: 99%

BISD: Scan-based Built-In self-diagnosis

Elm¹

2010

2010 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE 2010)

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Built-In Self-Test (BIST) is less often applied to random logic than to embedded memories due to the following reasons: Firstly, for a satisfiable fault coverage it may be necessary to apply additional deterministic patterns, which cause additional hardware costs. Secondly, the BIST-signature reveals only poor diagnostic information. Recently, the first issue has been addressed successfully. The paper at hand proposes a viable, effective and cost efficient solution for the second problem.The paper presents a new method for Built-In Self-Diagnosis (BISD). The core of the method is an extreme response compaction architecture, which for the first time enables an autonomous on-chip evaluation of test responses with negligible hardware overhead. The key advantage of this architecture is that all data, which is relevant for a subsequent diagnosis, is gathered during just one test session.The BISD method comprises a hardware scheme, a test pattern generation approach and a diagnosis algorithm. Experiments conducted with industrial designs substantiate that the additional hardware overhead introduced by the BISD method is on average about 15% of the BIST area, and the same diagnostic resolution can be obtained as for external testing.

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“…The reason is that traditional logic diagnosis is based on a stuck-at fault model. A complex cell internal defect may have a non-stuck-at behavior, (i.e., it is behaving as sa0 in one cycle and as sa1 in another cycle [15]), which may cause unexplained patterns and confuse the diagnosis algorithm. In [11] proposed X-based simulation and suspect validation by simulating extracted excitation conditions to address this issue.…”

Section: Introductionmentioning

confidence: 99%

Diagnosing Cell Internal Defects Using Analog Simulation-Based Fault Models

Tang

Benware

Reese

et al. 2014

2014 IEEE 23rd Asian Test Symposium

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The industry is encountering an increasing number of front-end-of-line defects in the most advanced technology nodes due to extremely small feature size and complex manufacturing processes. Traditional scan diagnosis algorithms can locate a defective cell by examining its excitation conditions for cell internal defects, but cannot provide the more precise defect location inside the cell that is necessary for effective physical failure analysis and statistical yield learning. In this work, we propose a new cell-aware diagnosis algorithm, based on accurate fault models derived by analog simulation, that can pinpoint the defect location within a cell for various cell internal defects. The proposed method already has achieved dramatic resolution improvement for real silicon failures.

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Adaptive Debug and Diagnosis without Fault Dictionaries

Cited by 18 publications

References 26 publications

Diagnosis of Multiple-Voltage Design With Bridge Defect

Diagnosis of Multiple-Voltage Design With Bridge Defect

BISD: Scan-based Built-In self-diagnosis

Diagnosing Cell Internal Defects Using Analog Simulation-Based Fault Models

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