Adapting router buffers for energy efficiency

Vishwanath, Arun; Sivaraman, Vijay; Zhi, Zhao; Russell, Craig; Thottan, Marina

doi:10.1145/2079296.2079315

Cited by 27 publications

(13 citation statements)

References 14 publications

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“…A.Vishwanath et al [15] introduced an algorithm that activates buffers incrementally as needed and puts them to sleep when not in use. Thresholds are set to trigger on-chip buffers, SRAM and DRAM dynamically.…”

Section: Smart Standbymentioning

confidence: 99%

“…The energy consumption from 0 to time t consists of two parts in Eq.1: energy consumption contributed by multiple frequencies including sleep mode and the additional energy cost for frequency scaling. Here, we take three assumptions: 1) every frequency scaling, from fi to fj (i = j), has the same time and energy cost, where the energy cost includes a sleep mode energy consumption and additional energy cost, as p(f0)δ+p(δ); 2) the energy consumption of FIFOs are not related to the actual occupancy of packets, i.e., we do not consider dynamic buffer in [21]; 3) every calculation of power-scaling algorithms consumes no energy and time.…”

Section: The Problem Definitionmentioning

confidence: 99%

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Fine-grained power scaling algorithms for energy efficient routers

Song

Shi

2014

Proceedings of the Tenth ACM/IEEE Symposium on Architectures for Networking and Communications Systems

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Energy efficient router is one of the most important and promising devices in the roadmap towards green communication and networking. In recent years, automatical power scaling adapting with real-time network traffic in a router has been proved to be practical on real hardware, which is an implementation under the traffic aware philosophy. In this paper, we further explore this direction, and present four real-time power scaling algorithms for the fine-grained energy management within a router. These algorithms are all based on the traffic aware philosophy. We first classify the traffic characteristics into three categories of the core router, access router and home router and analyze the differences among them. Then, we propose two design methodologies, periodical scaling and threshold scaling, and address four algorithms in details. Finally, we use real network traffic to evaluate these algorithms and draw the conclusions. The experiments on real traffic show that more than 40% of the energy in a router can be saved by using proposed system-level power scaling methods. Based on those evaluations, we also find that three status modes with two working frequencies and a sleep in a router are enough to achieve near-optimal energy efficiency by using our algorithms, which indicates an easy and practical hardware modification.

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Section: Smart Standbymentioning

confidence: 99%

Section: The Problem Definitionmentioning

confidence: 99%

Fine-grained power scaling algorithms for energy efficient routers

Song

Shi

2014

Proceedings of the Tenth ACM/IEEE Symposium on Architectures for Networking and Communications Systems

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“…On the downside, they introduce delay and jitter, and are largely responsible for the high cost, power consumption and heat dissipation in core routers [2]- [4]. This has led high capacity router/switch manufacturers and network A. Vishwanath is with the Centre for Energy-Efficient Telecommunications, University of Melbourne; arun.v@unimelb.edu.au.…”

Section: Introductionmentioning

confidence: 99%

Enabling a Bufferless Core Optical Network Using Edge-to-Edge Packet-Level FEC

Vishwanath

Sivaraman

Thottan³

et al. 2013

IEEE Trans. Commun.

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Abstract-To cope with the phenomenal growth of the Internet over the next decade, core networks are expected to scale to capacities of terabits-per-second and beyond. Increasing the role of optics for switching and transmission inside the core network seems to be the most promising way forward to accomplish this capacity scaling. Unfortunately, unlike electronic memory, it remains a formidable challenge to build even a few packets of integrated all-optical buffers. In this context, we envision a bufferless (or near-zero buffer) core optical network and make three contributions: First, we propose a novel edge-to-edge based packet-level forward error correction (FEC) scheme that combats packet loss in the bufferless core, and characterise the impact of FEC strength on loss at a single link. Second, we develop a global optimisation framework for multi-hop networks, and propose a heuristic algorithm that adjusts FEC strength to achieve fairness amongst the different single-and multi-hop flows. Finally, we evaluate the performance of our FEC scheme for realistic mixes of short-and long-lived TCP flows, and show that edge-to-edge packet-level FEC can be tuned to effectively mitigate contention losses in the core, thus opening the doors to bufferless optical networks in the near future.

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“…Vishwanath et al explore buffer usage of routers and develop a buffer adapting algorithm for letting SRAM and DRAM buffers sleep while not being used [3]. Results show that up to 10% of the total energy consumption could be eliminated with negligible traffic congestion and latency.…”

Section: Introductionmentioning

confidence: 99%

A frequency adjustment architecture for energy efficient router

Song

2012

Proceedings of the ACM SIGCOMM 2012 Conference on Applications, Technologies, Architectures, and Protocols for Computer Communi

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With the rapid expansion of customer population and link bandwidth, energy expenditures of the Internet have been rising dramatically. To gain energy efficiency, we propose a novel router architecture, which allows each of its modules to adjust frequency according to traffic loads. Several modulation strategies are also discussed to ensure dwell time on low energy states and reduce blind switches. Our preliminary results show that the frequency adjustment router could save up to 40% of the total energy consumption.

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Adapting router buffers for energy efficiency

Cited by 27 publications

References 14 publications

Fine-grained power scaling algorithms for energy efficient routers

Fine-grained power scaling algorithms for energy efficient routers

Enabling a Bufferless Core Optical Network Using Edge-to-Edge Packet-Level FEC

A frequency adjustment architecture for energy efficient router

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