Active defects in MOS devices on 4H-SiC: A critical review

Moghadam, Hamid Amini; Dimitrijev, Sima; Han, Jisheng; Haasmann, Daniel

doi:10.1016/j.microrel.2016.02.006

Cited by 56 publications

(48 citation statements)

References 61 publications

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“…The density of interface states in 4H-SiC MOS structures has been extensively studied. A common observation is a relatively flat distribution in the bandgap with an exponential increase towards the conduction band edge E C [10][11][12] . Whereas the former part is often assigned to carbon-related defects directly at the interface 10,13 , the increase towards E C stems from electron traps in the oxide near the 4H-SiC/SiO 2 interface, so-called near interface traps (NITs) 14 .…”

Section: Resultsmentioning

confidence: 99%

An adapted method for analyzing 4H silicon carbide metal-oxide-semiconductor field-effect transistors

et al. 2019

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Silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) are key devices for next-generation power electronics. However, accurate determination of device parameters from 3-terminal characteristics is hampered by the presence of interface traps. Here we present a method that, in contrast to previous evaluation schemes, explicitly considers those defects. A well-tractable parametrization of the SiC/SiO 2-specific interface trap spectrum is introduced that reflects the body of known data. With this ingredient, we develop an analysis that targets for an accurate determination of device parameters from simple 3terminal characteristics. For its validation, we investigate MOSFETs with significantly different defect densities. The resulting parameterscharge carrier density, mobility and threshold voltageare in excellent agreement with Hall effect investigations on the very same devices, avoiding systematic errors inherent to conventional evaluation techniques. With this adapted scheme, 4H-SiC power MOSFETs, even packaged, can be meaningfully characterized, speeding up innovation cycles in energy-saving power electronics.

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Section: Resultsmentioning

confidence: 99%

An adapted method for analyzing 4H silicon carbide metal-oxide-semiconductor field-effect transistors

et al. 2019

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“…These electrons remain trapped for a very long time and repeated C-V measurements by sweeping in either direction will match the accumulation-to-depletion measurement. That is why standard C-V measurements on SiC MOS capacitors are performed from accumulation to depletion [9], [21]. However, the amount of this electron trapping depends on the value of positive voltage and the duration of positive-voltage biasing [22].…”

Section: Methodsmentioning

confidence: 99%

“…In spite of being commercialized and delivering higher performance compared to their silicon counterparts, 4H-SiC MOSFETs continue to suffer from low channel-carrier mobility [4], [5]. The low channel-carrier mobility is attributed to both interface [6], [7] and near-interface traps (NITs) [8], [9]. The most critical impact of these defects is at the operating gate voltage ( ), when the MOSFETs are biased in strong inversion.…”

Section: Introductionmentioning

confidence: 99%

Fast Near-Interface Traps in 4H-SiC MOS Capacitors Measured by an Integrated-Charge Method

et al. 2021

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Oxide traps existing in 4H-SiC MOS capacitors with fast response times that are active in the strong accumulation and depletion regions were characterized by an integrated-charge method. The method is based on the measurement of charging and discharging voltages across MOS capacitors in response to high-frequency voltage pulses. This method can identify traps with response times in the order of hundreds of nanoseconds. The results reveal an increasing density of near-interface traps with energy levels above the bottom of the conduction band, which are the active defects reducing the channel-carrier mobility in 4H-SiC MOSFETs.INDEX TERMS 4H-SiC MOS Capacitor, MOSFET, near-interface traps (NITs), near-interface trap density (DNIT), trap response time.

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“…For accurate simulation results, modelling the defects and traps is imperative. They directly influence the performance and strongly affect its reliability [51]. To highlight the effect of traps on the device performance and electrical characteristics, the P-i-N rectifier structure of Figure 9 was prepared for modelling and simulation.…”

Section: Silicon Carbidementioning

confidence: 99%

TCAD Device Modelling and Simulation of Wide Bandgap Power Semiconductors

Lophitis¹,

Arvanitopoulos²,

Perkins³

et al. 2018

Disruptive Wide Bandgap Semiconductors, Related Technologies, and Their Applications

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Technology computer-aided Design (TCAD) is essential for devices technology development, including wide bandgap power semiconductors. However, most TCAD tools were originally developed for silicon and their performance and accuracy for wide bandgap semiconductors is contentious. This chapter will deal with TCAD device modelling of wide bandgap power semiconductors. In particular, modelling and simulating 3C-and 4H-Silicon Carbide (SiC), Gallium Nitride (GaN) and Diamond devices are examined. The challenges associated with modelling the material and device physics are analyzed in detail. It also includes convergence issues and accuracy of predicted performance. Modelling and simulating defects, traps and the effect of these traps on the characteristics are also discussed.

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Active defects in MOS devices on 4H-SiC: A critical review

Cited by 56 publications

References 61 publications

An adapted method for analyzing 4H silicon carbide metal-oxide-semiconductor field-effect transistors

An adapted method for analyzing 4H silicon carbide metal-oxide-semiconductor field-effect transistors

Fast Near-Interface Traps in 4H-SiC MOS Capacitors Measured by an Integrated-Charge Method

TCAD Device Modelling and Simulation of Wide Bandgap Power Semiconductors

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