Accurate RF modeling of nanoscale MOSFET using BSIM6 including low levels of inversion

Chalkiadaki, Maria-Anna; Enz, Christian

doi:10.1016/j.mejo.2014.04.030

Cited by 4 publications

(4 citation statements)

References 25 publications

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“…Variation in the value of g DS with increasing frequency (Fig. 5(b)) confirms the existence of self-heating in the device [12], [22], [23], [24], [25], [35], [36], [37], [38], [39]. Difference between the two sets of measurement data (low and high frequency) in overlapping frequency range is the result of different resistance seen by two measuring instruments.…”

Section: A Thermal Characterizationmentioning

confidence: 56%

“…It can be observed that the total gate terminal capacitance is a combination of parasitic and intrinsic capacitances. Extraction of all terminal capacitances looking into the gate and drain terminal from de-embedded Y-parameters has been performed using the expressions given in (3) [22], [23], [24], [38], [44].…”

Section: Rf Characterizationmentioning

confidence: 99%

“…9(a)-(d)). U extracted from the Y-parameter data using the formula specified in [38] for V DS = V DD (vdd) and V DS = V DS,LIN is plotted in Figs. 9(b) and 9(d) respectively.…”

Section: Rf Characterizationmentioning

confidence: 99%

See 2 more Smart Citations

A Comprehensive RF Characterization and Modeling Methodology for the 5nm Technology Node FinFETs

Parihar

Pampori

Dwivedi

et al. 2023

IEEE J. Electron Devices Soc.

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This paper aims to provide insights into the thermal, analog, and RF attributes, as well as a novel modeling methodology, for the FinFET at the industry standard 5nm CMOS technology node. Thermal characterization shows that for a 165K change in temperature, the Sub-threshold Slope (SS) and threshold voltage vary by 69 % and ∼70 mV, respectively. At room temperature, a single gate contacted n-FinFET RF device exhibits a cutoff and maximum oscillation frequency of ∼100 GHz and ∼170 GHz, respectively. Analog and RF Figures of Merit (FoMs) for 5 nm technology at a device level and their temperature sensitivity are also reported. The industry standard BSIM-CMG model is modified to capture the impact of self-heating (SH) and parasitics. The SH model is based on measured data, and the modeling approach renders it independent of other model parameters. To the authors' knowledge, an iteration free approach to develop a model-card for RF applications is explained for the very first time. Excellent agreement between the measured data and the model indicates that our methodology is accurate and can be used for faster PDK development.

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Section: A Thermal Characterizationmentioning

confidence: 56%

Section: Rf Characterizationmentioning

confidence: 99%

See 1 more Smart Citation

A Comprehensive RF Characterization and Modeling Methodology for the 5nm Technology Node FinFETs

Parihar

Pampori

Dwivedi

et al. 2023

IEEE J. Electron Devices Soc.

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show abstract

“…The f T has been estimated from the plot as 19 GHz. The power gain (U) has been calculated as per (8) [41]. To estimate the f MAX , we have calculated the frequency at which the gain (extrapolated) becomes unity.…”

Section: B Hv Finfetsmentioning

confidence: 99%

Small-Signal and Large-Signal RF Characterization and Modeling of Low and High Voltage FinFETs for 14/16 nm Technology Node SoCs

Kar,

Parihar,

Huang

et al. 2024

IEEE J. Electron Devices Soc.

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Modern System-on-Chip (SoC) architectures necessitate low-voltage (LV) core transistors featuring excellent digital, analog, and radio frequency (RF) properties, as well as thick oxide transistors serving as robust I/O buffers and high-voltage (HV) transistors essential for efficient power management. This study presents a comprehensive DC to RF characterization, a detailed modeling strategy, and subsequent model parameter extraction for commercially produced LV and HV Fin Field Effect Transistors (FinFETs) at 14/16 nm technology. The industry-standard BSIM-CMG compact model is modified to accurately capture the characteristics of the HV FinFET devices integrated with the digital LV FinFETs for SoC applications. A detailed analysis of the DC, analog, and RF performance of LV, I/O, and HV FinFETs compared to the contemporary planar CMOS technology is performed. The large-signal performance of the device is evaluated using the developed model and validated with the measured data. Finally, a concise overview of the performance indicators associated with the modeled device is also presented.

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The effects of drain scatterings on the electron transport properties of strained-Si diodes with ballistic and non-ballistic channels

et al. 2015

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The effects of multiple scattering on the electron transport properties in drain regions are numerically investigated for the cases of strained-Si diodes with or without scattering in the channel. The performance of non-ballistic (with scattering) channel Si-diodes is compared with that of ballistic (without scattering) channel Si-diodes, using the strain and scattering model. Our results show that the values of the electron velocity and the current in the strain model are higher than the respective values in the unstrained model, and the values of the velocity and the current in the ballistic channel model are higher than the respective values in the non-ballistic channel model. In the strain and scattering models, the effect of each carrier scattering mechanism on the performance of the Si-diodes is analyzed in the drain region. For the ballistic channel model, our results show that inter-valley optical phonon scattering improves device performance, whereas intra-valley acoustic phonon scattering degrades device performance. For the strain model, our results imply that the larger energy splitting of the strained Si could suppress the inter-valley phonon scattering rate. In conclusion, for the drain region, investigation of the strained-Si and scattering mechanisms are necessary, in order to improve the performance of nanoscale ballistic regime devices.

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Accurate RF modeling of nanoscale MOSFET using BSIM6 including low levels of inversion

Cited by 4 publications

References 25 publications

A Comprehensive RF Characterization and Modeling Methodology for the 5nm Technology Node FinFETs

A Comprehensive RF Characterization and Modeling Methodology for the 5nm Technology Node FinFETs

Small-Signal and Large-Signal RF Characterization and Modeling of Low and High Voltage FinFETs for 14/16 nm Technology Node SoCs

The effects of drain scatterings on the electron transport properties of strained-Si diodes with ballistic and non-ballistic channels

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