Accelerator design for protein sequence HMM search

Parallelizing HMMER for Hardware Acceleration on FPGAs

“…Maddimsetty et al [10] have studied different hardware-software partitioning schemes, but they do not present actual hardware implementations. Oliver et al [12] propose an FPGA implementation of an HMM profile application and claim speed-up factors up to two orders of magnitude.…”

Preliminary results in accelerating profile HMM search on FPGAs

“…We previously explored this issue in [10] and showed that the sensitivity of full Plan7 models can be matched by our simplified models, at a manageable increase in computational cost, by reducing the hit threshold ρ for detecting a motif in a protein.…”

“…A HMMER PE uses substantial hardware resources for transition and emission parameters at the PE's model position which must be made available synchronously with the addition operations. Previous work [10] has determined that signed 16-bit values are sufficient to reduce underflow/overflow errors over a wide range of input sequences.…”

“…The load on the CPU depends on the cut-off threshold e-value used in the FPGA. The software processing times for various cut-off threshold e-values were previously presented in Table 2 of [10]. If the hardware takes less time than the path generation in software, then the software is a bottleneck.…”

“…Building on previous work in this area [10], our accelerator acts as a filter that eliminates the vast majority of potential matches between proteins and HMMs, leaving only a small fraction to be validated in software. We describe a systolic array architecture and methods to handle the large amounts of data involved in modeling the motifs.…”