2019 IEEE 21st International Conference on High Performance Computing and Communications; IEEE 17th International Conference On 2019
DOI: 10.1109/hpcc/smartcity/dss.2019.00351
|View full text |Cite
|
Sign up to set email alerts
|

Accelerating Homomorphic Full Adder Based on FHEW Using Multicore CPU and GPUs

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1

Citation Types

0
2
0

Year Published

2020
2020
2024
2024

Publication Types

Select...
2
2

Relationship

0
4

Authors

Journals

citations
Cited by 4 publications
(2 citation statements)
references
References 13 publications
0
2
0
Order By: Relevance
“…Lei et al ported FHEW-V2 [25] to GPU [51] and extended the Boolean implementation to 30-bit addition and 6-bit multiplication with a speed up to ≈2.5. Since TFHE extends FHEW and performs better than its predecessor, we consider TFHE as our baseline framework.…”
Section: Related Work 61 Parallel Framework For Fhementioning
confidence: 99%
“…Lei et al ported FHEW-V2 [25] to GPU [51] and extended the Boolean implementation to 30-bit addition and 6-bit multiplication with a speed up to ≈2.5. Since TFHE extends FHEW and performs better than its predecessor, we consider TFHE as our baseline framework.…”
Section: Related Work 61 Parallel Framework For Fhementioning
confidence: 99%
“…Lei et al ported FHEW-V2 [23] to GPU [48] and extended the boolean implementation to 30-bit addition and 6-bit multiplication with a speed up ≈ 2.5. Since TFHE extends FHEW and performs better than it predecessor, we consider TFHE as our baseline framework.…”
Section: Related Workmentioning
confidence: 99%