AC Power Loss and Signal Coupling in Very Large Scale Integration Backend Interconnects

Abstract

Both the coupling and AC power losses in integrated circuit interconnects in the radio-frequency regime have been measured. The AC power loss decreases with decreasing length, decreasing spacing, and increasing inter metal dielectric (IMD) thickness of parallel metal lines. The unwanted signal coupling and cross-talk monotonically decrease with increasing spacing and decreasing length of the parallel metal lines. However, increasing the IMD thickness from 0.7 to 6 mm improves the low frequency performance but not the maximum operation frequency. Using a high-resistivity Si (HRS) substrate the AC power loss is significantly reduced but is traded off with an increase in coupling loss. The most effective method of reducing both the AC power and coupling losses is the combined use of three dimensional (3D) integration and an HRS, which gives larger than 1-2 orders of magnitude improvement, up to 20 GHz.

High frequency electrical properties of copper interconnects patterned by resolution enhanced lithography

“…In addition, no measurement results are referred to in this work. Yu et al [266] described a multiple conductor model valid up to 50 GHz, however again substrate effect was ignored. Thus, SPICE compatible compact models for coupled on-chip interconnects valid over a wide band of frequencies are not available in literature.…”