AC Hot-Carrier Effects in Scaled MOS Devices

Takeda, Eiji; Izawa, R.; Umeda, Kazunori; Nagai, R.

doi:10.1109/irps.1991.363221

Cited by 6 publications

(4 citation statements)

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“…This is consistent with the results in [8]. As a result, should be mainly responsible for , while other factors should be hole trapping and generation of neutral electron traps near the interface due to the presence of the low-half cycle during the ac stress with fixed at high voltage [9], [10]This is supported by the larger value of than that of measured at Hz, as shown in Fig. 2.…”

Section: Resultssupporting

confidence: 88%

Dynamic-stress-induced enhanced degradation of 1/f noise in n-MOSFETs

Lai²,

Cheng³

2000

IEEE Trans. Electron Devices

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Section: Resultssupporting

confidence: 88%

Dynamic-stress-induced enhanced degradation of 1/f noise in n-MOSFETs

Lai²,

Cheng³

2000

IEEE Trans. Electron Devices

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“…IMPACT OF SCALING ON HCI Hot-carrier injection(HCI) into the gate oxide is certainly not a new issue. [13] Carriers, as they are accelerated along the channel can become energetic enough that, through scattering and/or impact ionization, they can be injected into the gate oxide thus causing interface-state generation. The TF equations describing this degradation mechanism are slightly different for n-channel and p-channel devices:…”

Section: Impact Of Scaling On Nbtimentioning

confidence: 99%

Reliability Trends with Advanced CMOS Scaling and The Implications for Design

McPherson

2007

2007 IEEE Custom Integrated Circuits Conference

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Scaling (for enhanced performance, increased functionality and cost reduction reasons) has pushed existing CMOS materials much closer to their intrinsic reliability limits. This will require that designers pay very close attention to both front-end-of-line (FEOL) and back-end-of-line (BEOL) reliability issues. As for the FEOL reliability issues, hyperthin gate oxide leakage, time-dependent dielectric breakdown (TDDB), and negative-bias temperature instability (NBTI) are near the top the list. In the case of hyper-thin gate oxides, TDDB can manifest itself in terms of multiple soft-breakdown events thus causing an unwanted rise in leakage; NBTI-induced p-channel device degradation tends to have a significant impact on minimum-voltage circuit operation. As for the important BEOL reliability issues, the top ones are: electromigration (EM), stress migration (SM), low-k dielectric TDDB, and mechanical weaknesses associated with the low-k films and their interfaces. The EM associated with Cu interconnects will continue to worsen with scaling due to increased interface effects; SM will require even fewer vacancies to coalesce which can cause an unwanted via resistance rise; and, relatively poor low-k TDDB behavior and low-k mechanical-weakness issues may require special interconnect layout considerations.

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“…However, several reports contradict the above conclusion. The difference may be due Lo the presence of inductive voltage spikes as concluded by Takeda [16], or due to the use of an insufficiently accurate model t o calculate the expected speed degradation, such as using I,, as the age driving force rather than Id3(Isub/IJ'. It is also possible that enhanced AC degradation is real and needs to be modelled.…”

Section: Discussion Of Enhanced Ac Degradationmentioning

confidence: 99%

Simulating hot-carrier effects on circuit performance

1992

Semicond. Sci. Technol.

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Hot carriers cause charge trapping in the gate oxide of MOSFETS and generate interface traps at Si/SiO, interfaces of MOSFETs and bipolar transistors. Models for N-channel and P-channel MOSFETS and for bipolar transistor degradations have been developed and implemented in an IC reliability simulator BERT. Several comparisons between simulation results and measurements are shown. There remain to be answered questions concerning the presence of excess degradation when the stressing signal frequency is high.

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AC Hot-Carrier Effects in Scaled MOS Devices

Cited by 6 publications

References 0 publications

Dynamic-stress-induced enhanced degradation of 1/f noise in n-MOSFETs

Dynamic-stress-induced enhanced degradation of 1/f noise in n-MOSFETs

Reliability Trends with Advanced CMOS Scaling and The Implications for Design

Simulating hot-carrier effects on circuit performance

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