Abnormal ${C}$ –${V}$  Hump Effect Induced by Hot Carriers in Gate Length-Dependent p-Type LTPS TFTs

Huang, Shin-Ping; Shih, Yao-Kai; Chung, Yu-Hua; Chen, Wei-Han; Wang, Terry Tai-Jui; Zhang, Shengdong; Chang, Ting‐Chang; Chen, Po-Hsun; Tsao, Yu‐Ching; Chen, Hong-Chih; Zheng, Yu‐Zhe; Chu, Ann-Kuo; Shih, Yu‐Shan; Wang, Yu-Xuan; Wu, Chia‐Ching

doi:10.1109/ted.2019.2942149

Cited by 4 publications

(1 citation statement)

References 23 publications

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“…[ 10,11 ] As a result, poor subthreshold swing (SS), larger power consumption, and inferior stability are commonly observed in BCE TFTs, which is unfavorable for the advanced display applications. [ 12–14 ] The evolution of next‐generation displays and flexible electronics requires higher resolution and faster switching speed, further strengthening the demand for improving carrier mobility, enhancing gate control ability, and lowering working voltage. [ 15,16 ] Thus, it is imperative to explore new structure for TFTs to satisfy the ever‐increasing requirements.…”

Section: Introductionmentioning

confidence: 99%

Self‐Alignment Embedded Thin‐Film Transistor with High Transparency and Optimized Performance

Zheng

et al. 2022

Adv Materials Technologies

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Amorphous oxide semiconductor thin‐film transistors (AOS TFTs) have shown significant potential in the applications of increasingly advanced transparent and flexible electronic devices, where high speed, high transparency, and low power consumption are highly demanded. Yet, typical back‐channel etch (BCE) configuration used in the majority of TFTs still suffers from poor gate controllability, severe electrical field dispersion, relatively large parasitic capacitance and contact resistance. Here, a new embedded structure for TFTs with self‐alignment and even simpler fabrication process, outperforming conventional BCE counterpart in above aspects, is proposed in this work. More concentrated electrical field, improved gate control ability accompanied with lower contact resistance are achieved in the embedded TFTs. Consequently, superior electrical characteristics with subthreshold swing of 106.7 mV dec−1 and mobility as high as 32.10 cm2 V−1 s−1 are obtained. In addition, leakage current as well as contact resistance evidently decline compared to that in traditional BCE TFTs. By the assistance of Silvaco TCAD simulation, the performance and mechanism behind are cross‐validated from another perspective. Overall, such embedded configuration has equipped TFTs with appealing performance and it is also possible to enable other devices exploiting such structure with new possibility and thus a broader application.

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Section: Introductionmentioning

confidence: 99%

Self‐Alignment Embedded Thin‐Film Transistor with High Transparency and Optimized Performance

Zheng

et al. 2022

Adv Materials Technologies

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Enhancing Hot-Carrier Reliability of Dual-Gate Low-Temperature Polysilicon TFTs by Increasing Lightly Doped Drain Length

Chen

Chang

Chen

et al. 2020

IEEE Electron Device Lett.

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The Transition of Threshold Voltage Shift of Al₂O₃/Si₃N₄ AlGaN/GaN MIS-HEMTs Under Negative Gate Bias Stress From DC to AC

Lee,

Chang,

Tai

et al. 2024

IEEE Trans. Electron Devices

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Abnormal ${C}$ –${V}$ Hump Effect Induced by Hot Carriers in Gate Length-Dependent p-Type LTPS TFTs

Cited by 4 publications

References 23 publications

Self‐Alignment Embedded Thin‐Film Transistor with High Transparency and Optimized Performance

Self‐Alignment Embedded Thin‐Film Transistor with High Transparency and Optimized Performance

Enhancing Hot-Carrier Reliability of Dual-Gate Low-Temperature Polysilicon TFTs by Increasing Lightly Doped Drain Length

The Transition of Threshold Voltage Shift of Al₂O₃/Si₃N₄ AlGaN/GaN MIS-HEMTs Under Negative Gate Bias Stress From DC to AC

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Abnormal ${C}$ –${V}$ Hump Effect Induced by Hot Carriers in Gate Length-Dependent p-Type LTPS TFTs

Cited by 4 publications

References 23 publications

Self‐Alignment Embedded Thin‐Film Transistor with High Transparency and Optimized Performance

Self‐Alignment Embedded Thin‐Film Transistor with High Transparency and Optimized Performance

Enhancing Hot-Carrier Reliability of Dual-Gate Low-Temperature Polysilicon TFTs by Increasing Lightly Doped Drain Length

The Transition of Threshold Voltage Shift of Al2O3/Si3N4 AlGaN/GaN MIS-HEMTs Under Negative Gate Bias Stress From DC to AC

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The Transition of Threshold Voltage Shift of Al₂O₃/Si₃N₄ AlGaN/GaN MIS-HEMTs Under Negative Gate Bias Stress From DC to AC