A Voltage-Controlled Ring Oscillator With VCO-Gain Variation Compensation

Gui, Xiaoyan; Tang, Ruihua; Zhang, Yanlong; Li, Dan; Geng, Li

doi:10.1109/lmwc.2020.2967391

Cited by 35 publications

(16 citation statements)

References 5 publications

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“…As shown in Figure 1, the traditional ring voltage controlled oscillator (VCO) mainly includes current source circuit, RC circuit, operational amplifier circuit (OPA), VCO and other circuit structures 8 . Its main working process is as follows: the current source provides currents IBIAS1 and IBIAS2 for RC circuit and OPA respectively; The resistance R branch in the RC circuit provides the reference voltage VR for the lower OPA; The capacitor C branch completes the charging and discharging process alternately under the control of the ordinary switch, and takes the voltage on it as the input VC at the other end of the OPA; The voltages VR and VC are differentially amplified by the OPA to obtain the voltage V0; In VCO, the output clock signal Fout is converted; In addition, the output clock will feed back to control the operation of the current source and RC circuit, so as to realize the circuit feedback control 9 .…”

Section: Traditional Ring Voltage Controlled Oscillator Circuitmentioning

confidence: 99%

Design of high precision ring ICO circuit with power supply voltage of 0.77V in 0.18µm CMOS process

Yan

Chen

Zhou

et al. 2022

Third International Conference on Computer Science and Communication Technology (ICCSCT 2022)

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In this study, a circuit structure of ring current controlled oscillator (ICO) is proposed. Through the cooperation of counter, bootstrap switch with special timing control and special ICO circuit module, the output frequency accuracy in traditional ring OSC is avoided from being affected by voltage range limitation and comparator delay, the temperature and voltage characteristics of output clock are improved, and the output clock with higher accuracy is obtained under low voltage and low power consumption. The test chip is manufactured by 0.18 µm CMOS process. The power supply voltage is 0.77 V, and its output frequency is 1.32 MHz. The deviation of the output clock with the power supply voltage is within ± 1%, the deviation with the temperature is within ± 2.5%, and the power consumption is 382 nW.

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Section: Traditional Ring Voltage Controlled Oscillator Circuitmentioning

confidence: 99%

Design of high precision ring ICO circuit with power supply voltage of 0.77V in 0.18µm CMOS process

Yan

Chen

Zhou

et al. 2022

Third International Conference on Computer Science and Communication Technology (ICCSCT 2022)

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“…We get the difference N(0) of Na minus Nb. Then Kvco_code is increased by 1, and the above process is repeated to obtain N(2), N(3), N(4), N(5), N (6), N (7). Finally, we compare which difference is closest to 21.75.…”

Section: The Proposed Lc Vcomentioning

confidence: 99%

“…A phase-locked loop (PLL) is an important building block in communication systems such as Wireless Local Area Network (WLAN) [1,2,3,4,5]. Voltage-Control Oscillator (VCO) is a critical module of PLL, and its performance directly influences the performance of PLL [6,7,8,9]. The VCO gain, K VCO , is a key parameter that affects the loop bandwidth, stability, and phase noise [10,11,12].…”

Section: Introductionmentioning

confidence: 99%

A 5.67-8.75GHz LC VCO with small gain variation for 2.4GHz-band WLAN applications

Tian

Huang

et al. 2021

IEICE Electron. Express

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In this paper, a 5.67-8.75 GHz LC VCO with small gain variation and reconfigurable buffer for 2.4 GHz-band WLAN applications is presented and implemented in a Semiconductor Manufacturing International Corporation (SMIC) 55 nm CMOS process. The VCO gain is a strong function of the capacitance. For wide frequency tuning range meaning the large gain variation. The gain calibration scheme is proposed to obtain small gain variation across the frequency range. This letter proposes a reconfigurable buffer with adjustable amplitude, low jitter, and small supply coupling issues. The results show the proposed gain calibration scheme is very effective. The measured phase noise at 6.69 MHz offset is -123.2 dBc/Hz at 4.9 GHz output frequency.

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“…In the DE algorithm each individual is mutated to generate an adaptive solution v ij from three randomly selected parents, as given in (7). Afterwards, the crossover takes place creating a trial solution, through the recombination of a mutated solution v ij with an individual x ij , given by (8). Finally, the replacement is carried out employing an elitist selection, where the new individual will replace its parent if its objective function value is better than the parent, as given in (9) [33].…”

Section: Problem Formulation For the Optimization Of The Vco By Apply...mentioning

confidence: 99%

“…The VCO can be implemented by using complementary metal-oxide-semiconductor (CMOS) technology of integrated circuits, as already shown in [5], and also by using LC-tank structures. Several CMOS VCO designs can be classified by using single-ended stages [6,7], differential stages [8,9] and pseudo-differential stages [10]. Among the currently available VCO topologies, the one consisting of a ring structure [11], and using CMOS differential stages has the advantage of providing great immunity to supply disturbances [12].…”

Section: Introductionmentioning

confidence: 99%

Single-Objective Optimization of a CMOS VCO Considering PVT and Monte Carlo Simulations

Castañeda-Aviña

Tlelo‐Cuautle

Fraga

2020

MCA

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The optimization of analog integrated circuits requires to take into account a number of considerations and trade-offs that are specific to each circuit, meaning that each case of design may be subject to different constraints to accomplish target specifications. This paper shows the single-objective optimization of a complementary metal-oxide-semiconductor (CMOS) four-stage voltage-controlled oscillator (VCO) to maximize the oscillation frequency. The stages are designed by using CMOS current-mode logic or differential pairs and are connected in a ring structure. The optimization is performed by applying differential evolution (DE) algorithm, in which the design variables are the control voltage and the transistors’ widths and lengths. The objective is maximizing the oscillation frequency under the constraints so that the CMOS VCO be robust to Monte Carlo simulations and to process-voltage-temperature (PVT) variations. The optimization results show that DE provides feasible solutions oscillating at 5 GHz with a wide control voltage range and robust to both Monte Carlo and PVT analyses.

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A Voltage-Controlled Ring Oscillator With VCO-Gain Variation Compensation

Cited by 35 publications

References 5 publications

Design of high precision ring ICO circuit with power supply voltage of 0.77V in 0.18µm CMOS process

Design of high precision ring ICO circuit with power supply voltage of 0.77V in 0.18µm CMOS process

A 5.67-8.75GHz LC VCO with small gain variation for 2.4GHz-band WLAN applications

Single-Objective Optimization of a CMOS VCO Considering PVT and Monte Carlo Simulations

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