A voltage-controllable linear MOS transconductor using bias offset technique

Wang, Z.; Guggenbühl, W.

doi:10.1109/4.50321

Cited by 147 publications

(41 citation statements)

References 6 publications

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“…The experimental results are in good agreement with the simulation results in most cases. In some cases, the absolute value Ofgac/Pdiss being very small (i.e., unbalance bias phasing (13,14), (15, 16), and (17, 18)), the possibility of a large relative error exists because of process parameter tolerance, the general inadequacy of SPICE models for analog Figure 6. Optimal gac/Pdiss versus Vth for unbalanced-biased four-MOS transconductor with phase set t.…”

Section: Resultsmentioning

confidence: 98%

A few CMOS transconductors optimized for low power and wide band operation

Raut

Guo

2001

Circuits Systems and Signal Process

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Abstract.Maximizing the bandwidth of operation relative to dc power dissipation in complementary metal oxide semiconductor (CMOS) transconductors has been addressed in this article. It is proposed that the ac transconductance-to-dc power dissipation ratio is an appropriate objective function in this case. The general nature of the objective function is examined first. CMOS transconductors with two and four MOS working transistors are analyzed next. For structures of each kind, the ac transconductance-to-dc power dissipation ratio is maximized, and the optimal set of voltage variables is evaluated. For four-MOS structures with differential input signals, it is revealed that the choice of signal phase influences the objective function. The results of theoretical analyses are exhaustively tabulated. Numerical simulations are used to bring out the significance of the analytical expressions. This facilitates a comparison among several transconductors regarding the best possible ac transconductance-to-dc power dissipation ratio. These results are combined with HSPICE simulation results to suggest a few transconductor structures that are optimum with reference to the operation over wide bandwidths with lower power dissipation, high linearity, and low harmonic distortion.

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Section: Resultsmentioning

confidence: 98%

A few CMOS transconductors optimized for low power and wide band operation

Raut

Guo

2001

Circuits Systems and Signal Process

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“…To improve the linearity of the input transconductance amplifier (TCA), the multi-tanh technique [3] is widely used for a bipolartransistor-based TCA. There are also solutions for linearity improvement based on the square law I-V characteristics of the MOS transistors [4,5]. However, the short channel effect degrades the linearity, especially when a large gate-to-source voltage is applied on the device with a shorter gate length in an advanced CMOS technology.…”

Section: Introductionmentioning

confidence: 99%

“…By embedding passive components into multiplayer substrate and mounting active elements on the surface layer, LTCC technology offers opportunity to realize very compact systems, such as LTCC transmitters, receivers, or complicated transceiver modules [3,4]. LTCC bandpass filter (BPF) is a key component in these modules [5]. When the frequency is not high, LTCC filters are usually implemented by LC-element type.…”

Section: Introductionmentioning

confidence: 99%

Gilbert upconversion mixers using single‐band/dual‐band LC current combiners

Syu

Meng

Yen

et al. 2009

Micro & Optical Tech Letters

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The 0.35‐μm SiGe BiCMOS high linearity Gilbert upconverters are demonstrated in this article by utilizing NMOS and PMOS transconductance amplifiers (TCAs), respectively. To improve the linearity of a Gilbert upconverter, the IF input TCA is replaced by a bias‐offset differential pair. A reactive LC current combiner is used as the load of the Gilbert mixer to double the output current. The upconverter with an NMOS TCA achieves the conversion gain of −4 dB, the OP1dB of −11 dBm, and the OIP3 of 5.5 dBm, whereas the other one with a PMOS TCA has the conversion gain, OP1dB, and OIP3 of −6 dB, −11 dBm, and 9.5 dBm, respectively. Furthermore, the LC current combiner can be extended to a dual‐band version. The 2.4/5.7 GHz dual‐band upconverter is also demonstrated in this work. The conversion gain at 2.4/5.7 GHz is −3/−3.5 dB with the OP1dB of −15.5/−15 dBm and the OIP3 of −2.5/−3 dBm, respectively. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 1718–1722, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24433

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“…A CMOS transconductor featuring a bias-offset technique introduced by Wang and Guggenbuhl [14] demonstrated good linearity while maintaining design simplicity. The original form of the bias-offset technique applied to the conventional CMOS transconductor is not suitable for high frequency, low voltage applications.…”

Section: Introductionmentioning

confidence: 99%

8 GHz 1V, CMOS quadrature downconverter for wireless applications

Mahmoudi

Salama

2006

Analog Integr Circ Sig Process

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The design and implementation of an 8 GHz CMOS quadrature downconverter, achieving simultaneously low voltage supply operation and good linearity is presented in this paper. This is achieved by relaxing the inherent tradeoff between power conversion gain and linearity governing all active mixers and implementing a mixer using a new version of the bias-offset technique. The quadrature generator uses active inductors embodied in the LO buffer, and provides easy tuning by relaxing the coupling between amplitude and phase tuning of the outputs. It also provides reduced power consumption by eliminating the buffers located between the quadrature generator and the mixers. A prototype implemented in a 0.18 µm CMOS technology occupies an area of 0.44 × 0.3 mm 2 , operates from a 1V power supply and features an IIP3 of +3.5 dBm, an IIP2 of better than +48 dBm, an input compression point of −5.5 dBm, a power conversion gain of +6.5 dB for the mixers and a quadrature phase and amplitude matching of better than 1.5 • and 1 dB respectively over a bandwidth of 100 MHz after tuning. The overall power consumption of the quadrature downconverter is 25.8 mW.

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A voltage-controllable linear MOS transconductor using bias offset technique

Cited by 147 publications

References 6 publications

A few CMOS transconductors optimized for low power and wide band operation

A few CMOS transconductors optimized for low power and wide band operation

Gilbert upconversion mixers using single‐band/dual‐band LC current combiners

8 GHz 1V, CMOS quadrature downconverter for wireless applications

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