2011 20th European Conference on Circuit Theory and Design (ECCTD) 2011
DOI: 10.1109/ecctd.2011.6043642
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A VLSI implementation of logarithmic and exponential functions using a novel parabolic synthesis methodology compared to the CORDIC algorithm

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Cited by 18 publications
(10 citation statements)
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“…The results of the implementation carried out with the Parabolic Synthesis are based on [11] after a redesign without bonding pads. The results for chip area, path delay, and energy consumption per sample are shown in the upper entry of Table 5.…”
Section: Comparing Methodologiesmentioning
confidence: 99%
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“…The results of the implementation carried out with the Parabolic Synthesis are based on [11] after a redesign without bonding pads. The results for chip area, path delay, and energy consumption per sample are shown in the upper entry of Table 5.…”
Section: Comparing Methodologiesmentioning
confidence: 99%
“…The results for chip area, path delay, and energy consumption per sample are shown in the upper entry of Table 5. In [11], four sub-functions were used in the architecture. Unfortunately, in the implementation performed with Parabolic Synthesis in [11], no fully performed optimization of the word lengths in the look-up tables containing the coefficients was performed; therefore slightly longer word lengths than needed were used in this part of the design.…”
Section: Comparing Methodologiesmentioning
confidence: 99%
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