A Varied VSVM Strategy for Balancing the Neutral-Point Voltage of DC-Link Capacitors in Three-Level NPC Converters

Gui, Shi Weng; Lin, Zhen; Huang, Sheng

doi:10.3390/en8032032

Cited by 11 publications

(16 citation statements)

References 21 publications

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“…Some similar modulation approaches are also presented in Refs . These methods in Refs can all effectively suppress the low‐frequency oscillation at the neutral point. However, a common phenomenon can be found in the line‐to‐line voltages, as shown in Fig.…”

Section: Introductionmentioning

confidence: 99%

“…1, is the most widely studied and used in all types of industrial applications in the range of 2.3-4.16 kV, with some applications up to 6 kV [11]. A vast amount of literature [2,4,6,7,[12][13][14][15][16][17][18][19][20][21][22][23] is mainly dedicated to the modulation strategies and the balancing control of the neutral-point voltage. Seo et al [12] proposed a simplified three-level space vector pulse width modulation (SVPWM) method.…”

Section: Introductionmentioning

confidence: 99%

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A simplified hybrid carrier‐based PWM technique for three‐level NPC inverters considering neutral‐point voltage balance

Chen

Huang

et al. 2018

IEEJ Transactions Elec Engng

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An in‐depth analysis and comparison between the virtual space vector pulse width modulation (VSVPWM) method and the space vector pulse width modulation (SVPWM) method is presented in this paper. Compared to SVPWM, VSVPWM can achieve the balance of the neutral‐point voltage for any load over the full range of the inverter output voltage and for all load power factors. Nevertheless, VSVPWM would cause higher dv/dt of output voltages, higher voltage total harmonic distortion, and slower voltage‐balancing dynamic. A detailed analysis on these drawbacks is given. Then, the relationship between the neutral‐point current and the factor k0, which is employed to adjust the ratio of time of application of small vectors in a pair, is studied comprehensively, and a modified zero‐sequence voltage injection method for the two‐level inverter is introduced into the small hexagons of the three‐level space vector diagram. A simplified hybrid carrier‐based pulse width modulation (PWM) method is developed. Compared to VSVPWM, the proposed PWM method is not only easy to implement voltage‐balancing control but also reduces the switching frequencies of the devices and achieves better output voltage spectra and faster voltage‐balancing dynamic. All these benefits of the proposed method are verified through experimentation. © 2018 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A simplified hybrid carrier‐based PWM technique for three‐level NPC inverters considering neutral‐point voltage balance

Chen

Huang

et al. 2018

IEEJ Transactions Elec Engng

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“…Furthermore, voltage balancing of splitting DC-link capacitors is achieved via a neutral-point voltage deviation control algorithm [41][42][43] which ensures equal inflow and outflow of current at the neutral point Z, by adjusting the activation time of each switching device according to the instantaneous voltage across both splitting DC-link capacitors (V dc1 and V dc2 ). Finally, the switching control is accomplished through a 25 kHz Space Vector PWM (SVPWM) [15,16,41,44,45] switching algorithm.…”

Section: Harmonics Extraction Algorithmmentioning

confidence: 99%

DC-Link Capacitor Voltage Regulation for Three-Phase Three-Level Inverter-Based Shunt Active Power Filter with Inverted Error Deviation Control

et al. 2016

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Abstract:A new control technique known as inverted error deviation (IED) control is incorporated into the main DC-link capacitor voltage regulation algorithm of a three-level neutral-point diode clamped (NPC) inverter-based shunt active power filter (SAPF) to enhance its performance in overall DC-link voltage regulation so as to improve its harmonics mitigation performances. In the SAPF controller, DC-link capacitor voltage regulation algorithms with either the proportional-integral (PI) or fuzzy logic control (FLC) technique have played a significant role in maintaining a constant DC-link voltage across the DC-link capacitors. However, both techniques are mostly operated based on a direct voltage error manipulation approach which is insufficient to address the severe DC-link voltage deviation that occurs during dynamic-state conditions. As a result, the conventional algorithms perform poorly with large overshoot, undershoot, and slow response time. Therefore, the IED control technique is proposed to precisely address the DC-link voltage deviation. To validate effectiveness and feasibility of the proposed algorithm, simulation work in MATLAB-Simulink and experimental implementation utilizing a TMS320F28335 Digital Signal Processor (DSP) are performed. Moreover, conventional algorithms with PI and FLC techniques are tested too for comparison purposes. Both simulation and experimental results are presented, confirming the improvement achieved by the proposed algorithm in terms of accuracy and dynamic response in comparison to the conventional algorithms.

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“…However, multilevel inverters which have been reported to be superior to conventional two-level inverters [15][16][17] in term of output voltage quality (less harmonic distortions), are acknowledged as better alternative. The harmonic contents of the generated output voltage can be reduced greatly by increasing the number of output voltage levels.…”

Section: Introductionmentioning

confidence: 99%

“…However, for SAPF applications, the multilevel inverters employed are mostly limited to three-level inverters [2,18,19], as the high number of switching states and severe voltage imbalance problems of multilevel inverters (five-level and above) pose a great challenge in controller design. In three-level neutral-point diode clamped (NPC) inverter, voltage across the two splitting DC-link capacitors must equally be maintained at half of the overall DC-link voltage [2,17,19] so that a balanced injection current can be generated for effective cancellation of harmonic currents. Moreover, if the voltages are unbalanced, there is a high risk of premature switches failure due to over-stresses, and further increases of the total harmonics distortion (THD).…”

Section: Introductionmentioning

confidence: 99%

A Refined Self-Tuning Filter-Based Instantaneous Power Theory Algorithm for Indirect Current Controlled Three-Level Inverter-Based Shunt Active Power Filters under Non-sinusoidal Source Voltage Conditions

et al. 2017

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Abstract:In this paper, a refined reference current generation algorithm based on instantaneous power (pq) theory is proposed, for operation of an indirect current controlled (ICC) three-level neutral-point diode clamped (NPC) inverter-based shunt active power filter (SAPF) under non-sinusoidal source voltage conditions. SAPF is recognized as one of the most effective solutions to current harmonics due to its flexibility in dealing with various power system conditions. As for its controller, pq theory has widely been applied to generate the desired reference current due to its simple implementation features. However, the conventional dependency on self-tuning filter (STF) in generating reference current has significantly limited mitigation performance of SAPF. Besides, the conventional STF-based pq theory algorithm is still considered to possess needless features which increase computational complexity. Furthermore, the conventional algorithm is mostly designed to suit operation of direct current controlled (DCC) SAPF which is incapable of handling switching ripples problems, thereby leading to inefficient mitigation performance. Therefore, three main improvements are performed which include replacement of STF with mathematical-based fundamental real power identifier, removal of redundant features, and generation of sinusoidal reference current. To validate effectiveness and feasibility of the proposed algorithm, simulation work in MATLAB-Simulink and laboratory test utilizing a TMS320F28335 digital signal processor (DSP) are performed. Both simulation and experimental findings demonstrate superiority of the proposed algorithm over the conventional algorithm.

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A Varied VSVM Strategy for Balancing the Neutral-Point Voltage of DC-Link Capacitors in Three-Level NPC Converters

Cited by 11 publications

References 21 publications

A simplified hybrid carrier‐based PWM technique for three‐level NPC inverters considering neutral‐point voltage balance

A simplified hybrid carrier‐based PWM technique for three‐level NPC inverters considering neutral‐point voltage balance

DC-Link Capacitor Voltage Regulation for Three-Phase Three-Level Inverter-Based Shunt Active Power Filter with Inverted Error Deviation Control

A Refined Self-Tuning Filter-Based Instantaneous Power Theory Algorithm for Indirect Current Controlled Three-Level Inverter-Based Shunt Active Power Filters under Non-sinusoidal Source Voltage Conditions

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