A Two-Stage Ring Oscillator in 0.13-$\mu{\hbox{m}}$ CMOS for UWB Impulse Radio

Fahs, Bassem; Ali-Ahmad, W.Y.; Gamand, P.

doi:10.1109/tmtt.2009.2017246

Cited by 89 publications

(49 citation statements)

References 17 publications

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“…Different types of delay cells have been reported in the literature for oscillator design including multiple-feedback loops, dual-delay paths, and single ended delays [11][12][13][14][15][16][17][18][19][20]. Delay cells have been implemented by different approaches like inverter stages, latches, cross-coupled cells and so forth.…”

Section: Isrn Electronicsmentioning

confidence: 99%

A Low Power Voltage Controlled Oscillator Design

Kumar

2013

ISRN Electronics

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The performance of voltage controlled oscillator (VCO) is of great importance for any telecommunication or data transmission network. Here, voltage controlled oscillators (VCOs) using three-transistor NAND gates have been designed. New delay cell with three-transistor NAND gate has been used for designing the ring based VCO circuits. Three-, five-, and seven-stage VCOs have been proposed. Output frequency has been controlled with supply voltage variation from 1.8 V to 2.4 V. Three stage VCO shows output frequency variation in the range of 3.2909 GHz to 4.2280 GHz whereas power consumption varies in the range of 335.4071 W to 486.1816 W. Five-stage VCO depicts frequency in the range of 1.9406 GHz to 2.5769 GHz with power consumption variation from 559.0118 W to 810.3027 W. Moreover a seven-stage VCO shows frequency variation from 1.3984 GHz to 1.8077 GHz. Power consumption of seven-stage VCO varies from 782.6165 W to 1134.400 W. Phase noise results for these VCOs have also been obtained. Power consumption, output frequency, and phase noise results of proposed circuits have been compared with earlier reported circuits, and the proposed circuits show significant improvements.

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Section: Isrn Electronicsmentioning

confidence: 99%

A Low Power Voltage Controlled Oscillator Design

Kumar

2013

ISRN Electronics

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“…Many delay cell designs are reported in literature for VCO design including multiple-feedback loops, dualdelay paths and single ended delays [11][12][13][14][15][16][17][18][19]. Performance of these delay cells largely affects the performance of VCO circuit.…”

Section: Introductionmentioning

confidence: 99%

VCO Design using NAND Gate for Low Power Application

Kumar¹

2016

JSTS:Journal of Semiconductor Technology and Science

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“…Then, the frequency is further adjusted by using finetuning. Another method [5] uses a digitally controlled oscillator. In this technique, the frequency is tuned by switching in and out resistors.…”

Section: Introductionmentioning

confidence: 99%

3.6 GHz CMOS ring oscillator with low tune voltage sensitivity and temperature compensation

Özsema

Demirci

Leblebici

2015

2015 Nordic Circuits and Systems Conference (NORCAS): NORCHIP &Amp; International Symposium on System-on-Chip (SoC)

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Abstract-In this paper we present the design of a temperature compensated low-tune-voltage-sensitive CMOS ring oscillator in 40nm standard CMOS technology. The oscillator has an overall frequency range from 3.1 GHz to 3.6 GHz. The effect of temperature variations on the frequency span has been tuned out by an IPTAT (inversely proportional to absolute temperature) current reference. In this work, using a coarse-fine tuning mechanism lowers the tune range sensitivity of the oscillator, which is usually represented as KV CO . The achieved KV CO is around 490 MHz/V with 400 mV tune voltage sweep. The area and the power consumption of the ring oscillator are 0.0056 mm 2 and 0.9 mW.

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A Two-Stage Ring Oscillator in 0.13-$\mu{\hbox{m}}$ CMOS for UWB Impulse Radio

Cited by 89 publications

References 17 publications

A Low Power Voltage Controlled Oscillator Design

A Low Power Voltage Controlled Oscillator Design

VCO Design using NAND Gate for Low Power Application

3.6 GHz CMOS ring oscillator with low tune voltage sensitivity and temperature compensation

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