A Triple-Mode Performance-Optimized Reconfigurable Incremental ADC for Smart Sensor Applications

Abstract

This paper proposes a triple-mode discrete-time incremental analog-to-digital converter (IADC) employing successive approximation register (SAR)-based zooming and extended counting (EC) schemes to achieve programmable trade-off capability of resolution and power consumption in various smart sensor applications. It mainly consists of an incremental delta-sigma modulator and the proposed SAR-EC sub-ADC for alternate operation of the coarse SAR conversion and EC. They can be reconfigured to operate separately depending on the application requirements. The SAR-based zooming structure allows the IADC to have better linearity and resolution, and additional activation of the EC function gives the further resolution. During this reconfigurable conversion process, pipelined reusing operation of sub-blocks reduces the silicon area and the number of cycles for target resolutions. A prototype ADC is fabricated in a 180-nm CMOS process, and its triple-mode operation of high-resolution, medium-resolution, and lowpower is experimentally verified to achieve 116.1-, 109.4-, and 73.3-dB dynamic ranges, consuming 1.60, 1.26, and 0.39 mW, respectively. INDEX TERMS Analog-to-digital converter (ADC), incremental ADC, triple-mode, SAR-based zooming, extended counting, pipeline operation.

A Versatile SoC/SiP Sensor Interface for Industrial Applications: Implementation Challenges

“…This sets a need to have resolution tuning as an important feature of the ADCs. Variable resolution ADCs allow reducing the power consumption when a medium or low resolution mode is used [43], [49]- [53]. For example, the resolution-tunable ADC reported in [43] consumes 1.6 mW at 18 bit resolution, while it consumes only 0.39 mW when running at 11 bit resolution.…”

“…Variable resolution ADCs allow reducing the power consumption when a medium or low resolution mode is used [43], [49]- [53]. For example, the resolution-tunable ADC reported in [43] consumes 1.6 mW at 18 bit resolution, while it consumes only 0.39 mW when running at 11 bit resolution. Several approaches have been presented in the literature to control the resolution of ADCs.…”

LW-DEM: Designing a Low Power Digital-to-Analog Converter Using Lightweight Dynamic Element Matching Technique

“…sensor interfaces and measurement systems, which are the results of sensor networks, are in charge of IoT information collection [1], [2], and the low latency / low power wireless communication methods and devices that result from wireless networks are contributing to IoT communication [3], [4]. Consequently, the latest wireless sensor nodes, which are the cornerstone of the technical integration of the WSN, are playing a pivotal role in IoT data collection and communication.…”

“…Another approach to low-power sensor nodes is to adopt low-power network protocols [10], [11]. Focusing electronic components such as analog-to-digital converter (ADC) and digital-to-anlalog converter (DAC), which are typically power-hungry components in a wireless sensor node, and how to design them to lower their power consumption is another well-known approach [2], [12]- [15].…”