A top-down mixed-signal design methodology using a mixed-signal simulator and analog HDL

Murayama, T.; Gendai, Yuji

doi:10.1109/eurdac.1996.558078

Cited by 6 publications

(3 citation statements)

References 2 publications

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“…Several works on top-down approach are seen in [13], [14], [15]. With the top-down approach, the designer can verify the behavioral characteristics of the system at a very early stage since modeling is done using different hardware description languages (HDLs) [16]. Thus it avoids wastage of design time and resources.…”

Section: Related Workmentioning

confidence: 99%

Auto-generation of ams behavioral models in different languages from hybrid automata

Ain

Dasgupta

2010

2010 IEEE Students Technology Symposium (TechSym)

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This paper proposes a methodology for automatic generation of behavioral models of analog and mixed signal circuits in different languages from hybrid system based specification. The proposed approach captures the design specification of a class of circuits into a language independent high level library of models. Taking the user input, and the domain knowledge from the specification, and by parsing the library of models, the model generator automatically generates the behavioral models in different languages. In this work, the behavioral models are developed in Verilog-A and SPICE languages, which are often used in industrial applications and are also structurally different. The methodology is explained with a synthetic example of programmable gain amplifier with automatic gain control circuit.

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Section: Related Workmentioning

confidence: 99%

Auto-generation of ams behavioral models in different languages from hybrid automata

Ain

Dasgupta

2010

2010 IEEE Students Technology Symposium (TechSym)

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“…As it can be seen in Fig. 1, top down methodologies [7] begin with a simulation of each block of the system in a conceptual way (behavioral level). In a Nuclear Imaging System, physical models are used for the detector phase and electronic models for the electronic stage.…”

Section: A Simulation Flowmentioning

confidence: 99%

Accurate Simulation Testbench for Nuclear Imaging Systems

Monzó

Aliaga

Herrero

et al. 2008

IEEE Trans. Nucl. Sci.

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Current testbenches for nuclear imaging devices aim to simulate only a single stage of the system at a time. This approach is useful in early design stages where accuracy is not necessary. However, it would be desirable that different tools could be combined to achieve more detailed simulations. In this work, a high precision testbench is presented. It has been developed to test nuclear imaging systems. Its accuracy lies in the possibility of linking different simulation tools using the right one for each part of the system. High energy events are simulated using Geant4 (High Energy Simulator). Analog and digital electronics are verified using SpectreVerilog or UltrasimVerilog (Cadence Design Syst. Inc., San Jose, CA, USA) and ModelSim (Mentor Graphics Corp, Wilsonville, OR, USA). This testbench structure can be used to test any physical topology, scintillation crystals, Photomultiplier Tubes (PMTs), Avalanche Photodiodes (APDs), with any kind of ASIC, discrete analog and digital electronics, thus reducing the prototyping and design time. New system developments can be easily verified using behavioral and circuital description models for analog and digital electronics. Finally, a dual-head continuous LSO scintillation crystal Positron Emission Tomography (PET) system has been used as an example for evaluation of the testbench.Index Terms-Biomedical nuclear imaging, design methodology, positron emission tomography (PET), simulation, system analysis and design.

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“…They are certainly too slow for the hundreds of tests needed to cover all the operating modes. At the heart of this methodology is a technique called mixed-level simulation [8,13,16] to work around this issue. Mixed-level simulation is a means by which HDL or AHDL models can be run with transistor level models.…”

Section: Mixed-level Simulationmentioning

confidence: 99%

Verification of Complex Analog and RF IC Designs

Chang¹,

Kundert²

2007

Proc. IEEE

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Meeting performance specifications in the design of Analog and RF (A/RF) blocks and integrated circuits (IC) continues to require a high degree of skill, creativity, and expertise. However, today's A/RF designers are increasingly faced with a new challenge. Functional complexity in terms modes of operation, extensive digital calibration, and architectural algorithms is now overwhelming traditional A/RF design methodologies. Functionally verifying A/RF designs is a daunting task requiring a rigorous methodology. As occurred in digital design, analog verification is becoming a separate and critical task. This paper describes the verification issues faced by the A/RF designer and presents a verification methodology to address these challenges. It presents a systematic approach to A/RF verification, the concept of an analog verification engineer, how to establish the methodology, and concludes with an example.

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A top-down mixed-signal design methodology using a mixed-signal simulator and analog HDL

Cited by 6 publications

References 2 publications

Auto-generation of ams behavioral models in different languages from hybrid automata

Auto-generation of ams behavioral models in different languages from hybrid automata

Accurate Simulation Testbench for Nuclear Imaging Systems

Verification of Complex Analog and RF IC Designs

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