A Temperature-Dependent SPICE Model of SiC Power MOSFETs for Within and Out-of-SOA Simulations

Riccio, Michele; Alessandro, Vincenzo d; Romano, Gianpaolo; Maresca, Luca; Breglio, G.; Irace, Andrea

doi:10.1109/tpel.2017.2774764

Cited by 58 publications

(56 citation statements)

References 41 publications

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“…In power conversion systems, the ruggedness of switching devices is extremely important and critical to sustain unexpected situations, such as short circuit, voltage overshoot, surge current, etc. [1]- [3] The avalanche shock is one of the most serious issues of reliability, which is caused by the parasitic inductance of power circuits referred to as the avalanche failure [4]- [5].…”

Section: Introductionmentioning

confidence: 99%

Comprehensive Assessment of Avalanche Operating Boundary of SiC Planar/Trench MOSFET in Cryogenic Applications

Yang

et al. 2021

IEEE Trans. Power Electron.

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The avalanche ruggedness of power devices becomes a crucial issue to ensure the safe operation of the power conversion systems, particularly under the extreme temperature conditions. In this paper, the avalanche capability of SiC planar/trench MOSFETs is systematically evaluated and analyzed over the temperature range of 90 to 340 K. Importantly, the essential mechanisms and temperature dependence of avalanche failure under cryogenic conditions are further explored by combining many analysis methods such as TCAD simulations, the unclamped inductive switching characterizations, and the transient junction temperature prediction. The highest avalanche energy density of 171.24 mJ/mm 2 at 90K indicates the great application potential of SiC planner MOSFET in cryogenic electronics. Moreover, the safe avalanche operation boundary (AOB) model is established over the cryogenic temperature range. The relevant analysis method and AOB model can be used to accurately evaluate and quantitatively predict the avalanche capability of SiC planar/trench MOSFETs for the cryogenic converter design.

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Section: Introductionmentioning

confidence: 99%

Comprehensive Assessment of Avalanche Operating Boundary of SiC Planar/Trench MOSFET in Cryogenic Applications

Yang

et al. 2021

IEEE Trans. Power Electron.

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“…This contribution is relevant for modeling SiC MOSFETs because interface traps are more prevalent in the SiC/SiO2 interface than in Si/SiO2. Riccio et al extend the work originally published in [20] to include leakage over temperature, avalanche and shortcircuit behavior, and mobility degradation dictated by high electric fields [19].…”

Section: B Recent Semi-physics Modelsmentioning

confidence: 97%

“…For example, since behavioral models are usually defined and calibrated within the device safe operating area (SOA), they may produce inaccurate and misleading results during fault conditions such as avalanche, over-current, or gate stress. While additional behavior can be defined to capture fault conditions [19], each addition requires additional modeling effort to capture and also increases model complexity.…”

Section: Models Selected For Trade Studymentioning

confidence: 99%

Computational Efficiency Analysis of SiC MOSFET Models in SPICE: Static Behavior

Nelson

Lemmon

Jimenez

et al. 2020

IEEE Open J. Power Electron.

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Transient simulation of complex converter topologies is a challenging problem, especially in detailed analysis tools like SPICE. Much of the recent literature on SPICE transistor modeling ignores the requirements of application designers and instead emphasizes detail, physical accuracy, and complexity. While these advancements greatly improve model accuracy, they also serve to increase computational complexity, making the resulting models less attractive to application designers. While some authors depart from this trend and present models which emphasize simulation speed, their results and analysis are limited to qualitative observation. This research develops a methodology to quantify the computational cost of model features and competitively benchmark models against each other. Additionally, it reviews recently published SiC MOSFET models and presents a trade study on several candidate models likely to fare well in complex application simulations. Finally, this study also identifies key considerations which should be carried forward into future model design.

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“…Due to the competing temperature dependences of the channel resistance and bulk resistance inside the SiC MOSFET device [6], [7], the total drain-source on-state resistance increases first and then decreases along with the decrease of operating junction temperature. The current literatures focus mainly on the performance of SiC MOSFETs at high temperatures up to 200 • C or above [8]- [10], though very little has been reported with regard to the cryogenic operations of SiC MOSFETs at negative temperatures [11], [12]. Moreover, even in the most of cryogenic performance investigations of SiC MOSFETs at present, some pulsed currents having their lasting durations of tens to hundreds of microseconds are normally applied to test and evaluate the temperature-dependent and current-dependent R DS(on) behaviors.…”

Section: Introductionmentioning

confidence: 99%

Experimental Investigations Into Temperature and Current Dependent On-State Resistance Behaviors of 1.2 kV SiC MOSFETs

Hong

Chen

et al. 2019

IEEE J. Electron Devices Soc.

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Performance characterization for long-time operation of cryogenic SiC MOSFETs remains as a challenge that requires further investigation. This paper presents experimental investigations into temperature and current dependent on-state resistance behaviors of state-of-the-art 1.2 kV SiC MOSFETs from various well-known semiconductor manufacturers. In view of engineering applications, two fitted double-exponential functions are introduced to visually depict the interactions among the on-state resistance, junction temperature and drain current instead of considering the combined effects of electron mobility and ionized dopant concentration inside cryogenic SiC MOSFETs. Optimal operating temperature and current ranges are subsequently extracted to characterize the cryogenic operation performance, and thus to explore some operating and designing guidelines of cryogenic SiC MOSFETs and SiC-based power conversions at 77 K.

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A Temperature-Dependent SPICE Model of SiC Power MOSFETs for Within and Out-of-SOA Simulations

Cited by 58 publications

References 41 publications

Comprehensive Assessment of Avalanche Operating Boundary of SiC Planar/Trench MOSFET in Cryogenic Applications

Comprehensive Assessment of Avalanche Operating Boundary of SiC Planar/Trench MOSFET in Cryogenic Applications

Computational Efficiency Analysis of SiC MOSFET Models in SPICE: Static Behavior

Experimental Investigations Into Temperature and Current Dependent On-State Resistance Behaviors of 1.2 kV SiC MOSFETs

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