A survey of in-spin transfer torque MRAM computing

Abstract

In traditional von Neumann computing architectures, the essential transfer of data between the processor and memory hierarchies limits the computational efficiency of next-generation system-on-a-chip. The emerging in-memory computing (IMC) approach addresses this issue and facilitates the movement of significant data and rapid computations. Among the different memory types, intrinsic energy efficiency is demonstrated by in-magnetic random access memory (MRAM) computing with a low-power spintronic magnetic tunnel junction device and hybrid integration at an advanced complementary metal-oxide semiconductor node. This study reviews state-of-the-art techniques for managing IMC with an emphasis on spin-transfer torque-MRAM computing via design schemes at the bit-cell, circuit, and system levels. In addition, this study presents effective design techniques and potential challenges and demonstrates the existing limitations of in-MRAM computing and potential methods for overcoming these issues. This study also considers the design technology co-optimization from the IMC perspective.

Spin Dynamics in Magnetic Nano-Junctions

“…These studies are often directly applicable to the investigation of dynamical properties of single-molecule magnets [35][36][37], magnetic impurities embedded in metallic hosts [35,[38][39][40][41][42][43] or even larger ferromagnetic systems whose dynamics can be represented by a single macrospin [18,44,45]. Nevertheless, no-less important is the insight that they provide into the dynamics of more complex magnetic structures [15,16,34,[46][47][48][49][50] and into the general interplay between localized magnetic moments and conduction electrons [50][51][52][53] relevant for spintronics applications [54][55][56][57].…”

Field-Free Magnetization Switching in A1 CoPt Single-Layer Nanostructures for Neuromorphic Computing

“…The spin–orbit torque (SOT)-driven magnetization switching is considered as the next-generation writing technology of spintronic memory and logic circuits because of its fast speed and low power consumption. − The SOT switching usually needs the assistance of an external magnetic field in the traditional heavy metal/ferromagnetic (HM/FM) heterostructures with spatial inversion. In these structures, due to spin–orbit coupling and inversion symmetry breaking, SOT can be generated based on the Rashba–Edelstein effect and/or spin Hall effect , to realize the electrical manipulation of magnetization.…”

Logic‐In‐Memory Characteristics of Reconfigurable Feedback Field‐Effect Transistors with Double‐Gated Structure

“…[1][2][3][4][5]33] Various memory devices, including resistive random-access memory (RRAM), magnetoresistive RAM (MRAM), static RAM (SRAM), and dynamic RAM (DRAM), have been widely researched for developing LIM. [5][6][7][8][9][10][11][12][13][14][15][16] Particularly, LIM composed of RRAM or MRAM has performed stateful logic operations via voltage division between the devices and resistors. [6][7][8][9][10][11] LIM comprising SRAM or DRAM arrays has demonstrated relatively high reliability, high computation speed, and low operating voltage compared to RRAM-or MRAM-based LIM.…”

“…[ 5–16 ] Particularly, LIM composed of RRAM or MRAM has performed stateful logic operations via voltage division between the devices and resistors. [ 6–11 ] LIM comprising SRAM or DRAM arrays has demonstrated relatively high reliability, high computation speed, and low operating voltage compared to RRAM‐ or MRAM‐based LIM. [ 12–16 ]…”

“…[5][6][7][8][9][10][11][12][13][14][15][16] Particularly, LIM composed of RRAM or MRAM has performed stateful logic operations via voltage division between the devices and resistors. [6][7][8][9][10][11] LIM comprising SRAM or DRAM arrays has demonstrated relatively high reliability, high computation speed, and low operating voltage compared to RRAM-or MRAM-based LIM. [12][13][14][15][16] Recently, feedback field-effect transistors (FBFETs) that operate via positive feedback (PF) loop mechanisms have attracted DOI: 10.1002/aelm.202300132 attention for LIM.…”