A Survey of Electrical Signatures Characteristic of Step-Stressed InGaP/GaAs HBTs

Abstract

Step-stress experiments on high-voltage Npn InGaP/GaAs HBTs are shown to reveal a number of degradation mechanisms, singly or in combinations: defect buildup in the emitter depletion region, defect buildup in the neutral base region, possible degradation of Ohmic contacts or increase in epitaxial layer resistances. Defect buildup in the emitter depletion region often precedes other types of degradation. Two less commonly reported degradation mechanisms are also suggested: base Ohmic metal punch-through to the collector and deterioration of the die attach material. It was found that the vast majority of devices failed within 5% of a maximum attainable power level, but when stressed just shy of this catastrophic level, electrical characteristics typically degraded gradually.

(Invited) (ECS Electronics & Photonics Division Award )Wafer-Level Step-Stressing of InGaP/GaAs HBTs

“…The BC diode plot also shows changes in the generation-recombination region of the I-V curves, while other data plots are relatively unchanged. This type of stress evolution has been identified in a previous publication and its evolution is described in greater detail [12]. Briefly, evidence suggests a thermal reaction of the base Ohmic contact is possible.…”

“…This point and its implications will be discussed further in the next section. We do not attempt to place a precise value on this temperature due to the uncertainty in the thermal conductivity parameter, but we have estimated previously that this temperature is in excess of 400°C [12]. The inset shows a magnification of the P plot on a linear scale so that the consistency in the destructive power limit is better observed.…”

“…During this wafer-level burn-in study, the types of degradation encountered have been a subset of those described in a previous publication [12] from our research laboratory as well as external studies carried out under a large number of conditions (affecting acceleration factors) [1,[3][4][5][6][7][8][9][10]. In general, gradual degradation of the low current region of the Gummel curves, gradual reduction of the BE breakdown voltage, and gradual increase in the offset voltage were observed in greater detail than what is discussed in this paper.…”

“…The HBTs are designed for breakdown voltage ranging from 20 to 50 V, which is achieved through the doping level and thickness of the collector layer. The fabrication process has been described previously [13]. Briefly, a triple mesa process with wet chemical etching is used for the formation of device mesas.…”

“…We have found that interrupted stressing experiments, with complete characterization of HBTs during the interruption, can give a more complete picture of the degradation that occurs during bias stressing of HBTs. We have previously correlated electrical signatures with degradation in step-stressing of packaged InGaP/GaAs HBTs [12]. In this work we will present some results of step-stress experiments which have been conducted at the wafer level for InGaP/GaAs HBTs.…”