A super-polynomial lower bound for regular arithmetic formulas

Abstract

We consider arithmetic formulas consisting of alternating layers of addition (+) and multiplication (×) gates such that the fanin of all the gates in any fixed layer is the same. Such a formula Φ which additionally has the property that its formal/syntactic degree is at most twice the (total) degree of its output polynomial, we refer to as a regular formula. As usual, we allow arbitrary constants from the underlying field F on the incoming edges to a + gate so that a + gate can in fact compute an arbitrary F-linear combination of its inputs. We show that there is an (n 2 + 1)-variate polynomial of degree 2n in VNP such that any regular formula computing it must be of size at least n Ω(log n) .Along the way, we examine depth four (ΣΠΣΠ) regular formulas wherein all multiplication gates in the layer adjacent to the inputs have fanin a and all multiplication gates in the layer adjacent to the output node have fanin b. We refer to such formulas as ΣΠ [b] ΣΠ [a] -formulas. We show that there exists an n 2

On the Power of Homogeneous Depth 4 Arithmetic Circuits

“…Thus, any asymptotic improvement in the exponent, in either the upper bound on depth reduction or the lower bound of [KSS13] would separate VNP from VP. Both papers [GKKS13a,KSS13] used the notion of the dimension of shifted partial derivatives as a complexity measure, a refinement of the Nisan-Wigderson complexity measure of dimension of partial derivatives. The most tantalizing questions left open by these works was to improve either the depth reduction or the lower bounds.…”

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“…The following is implicit in [9] and is stated explicitly in [13]. We are now ready to prove Putting it all together, we have obtained that asymptotically,…”

“…The above corollary also yields a lower bound for the model of regular formulas, which were introduced and studied in the work of Kayal et al [13]. [13,Theorem 9] …”

“…Building on this, the first non-trivial lower bound for ΣΠ [O(d/t)] ΣΠ [t] circuits was proved by Gupta, Kamath, Kayal, and Saptharishi [9] for the determinant and permanent polynomials. This was further improved by Kayal, Saha, and Saptharishi [13] who gave a family of explicit polynomials in VNP for which the shifted partial derivative complexity is (nearly) as large as possible 1 and hence showed a lower bound of N Ω(d/t) for the top fan-in of ΣΠ [O(d/t)] ΣΠ [t] circuits computing these polynomials. Later, a similar result for a polynomial in VP was proved in [6] and this was subsequently strengthened by Kumar and Saraf [17], who gave a polynomial computable by homogeneous ΠΣΠ circuits such that any ΣΠ [O(d/t)] ΣΠ [t] circuits computing it must have top fan-in N Ω(d/t) .…”

Improved Lower Bound for Multi-R-IC Depth Four Circuits as a Function of the Number of Input Variables

“…For this, we pick a variant of the Nisan-Wigderson polynomial, which was defined in (Kayal et al, 2014(Kayal et al, , 2016a. The construction is inspired by the well known Nisan-Wigderson design (Nisan and Wigderson, 1994) and Reed-Solomon codes (Reed and Solomon, 1960).…”