2017
DOI: 10.16943/ptinsa/2017/49224
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Improved Lower Bound for Multi-R-IC Depth Four Circuits as a Function of the Number of Input Variables

Abstract: An arithmetic circuit (respectively, formula) is a rooted graph (respectively, tree) whose nodes are addition or multiplication gates and input variables/nodes. It computes a polynomial in a natural way. The formal degree of an addition (respectively, multiplication) gate with respect to a variable x is defined as the maximum (respectively, sum) of the formal degrees of its children, with respect to x. The formal degree of an input node with respect to x is 1 if the node is labelled with x, and 0 otherwise. In… Show more

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Cited by 2 publications
(2 citation statements)
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References 13 publications
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“…If we can show superpolynomial size lower bounds against multi-r-ic depth four circuits for r = n c for any constant c, then we indeed have superpolynomial circuit size lower bounds against depth four circuits. We believe that by building on the work of [20,11], Theorem 1 is a step towards that direction.…”
Section: Motivation For This Workmentioning
confidence: 99%
“…If we can show superpolynomial size lower bounds against multi-r-ic depth four circuits for r = n c for any constant c, then we indeed have superpolynomial circuit size lower bounds against depth four circuits. We believe that by building on the work of [20,11], Theorem 1 is a step towards that direction.…”
Section: Motivation For This Workmentioning
confidence: 99%
“…Towards this, in the same paper, they showed a lower bound of 2 Ω( √ N) for a N-variate polynomial that is not multilinear. Hegde and Saha [HS17] proved a bound of 2…”
Section: Introductionmentioning
confidence: 99%