A 234-261-GHz signal source with record 7.2-dBm output power at 240 GHz and −105 dBc/Hz phase noise at 10-MHz offset is reported. Fabricated in a production 55-nm SiGe BiCMOS process with HBT f T / f MAX of 330/350 GHz, the circuit includes a 120-GHz fundamental frequency VCO with 1.2-V AMOS varactors, a broadband MOS-HBT cascode LO tree driving a divide-by-128 chain, and a doubler with a record drain efficiency of 11.9%. The total power consumption of the signal source is 386 mW resulting in a DC-to-RF efficiency of 1.3%. A detailed discussion of the candidate LO-tree and doubler topologies and of the design methodology, which capitalizes on the MOS-HBT cascode and unique features of the 55-nm SiGe BiCMOS process, is provided. Index Terms-Divider, frequency doubler, J-band circuit, mm-wave circuits, MOS-HBT cascode, SiGe BiCMOS, signal source, VCO.