A study of bridging defect probabilities on a Pentium (TM) 4 CPU

Fault-Tolerance of Robust Feed-Forward Architecture Using Single-Ended and Differential Deep-Submicron Circuits Under Massive Defect Density

“…The actual model is highly dependent on geometrical characteristics of layout, where maintaining correspondence between physical and electrical parameters remains as a problem that needs to be solved. In the transistor level simulations this layer can be excluded, considering that more than 80% [7] of signal errors in modern circuits are due to global signals stuck-at supply or ground.…”

A bridging fault model where undetectable faults imply logic redundancy

“…The four-way bridging fault model was defined to aid in generating effective manufacturing tests for static defects in industrial designs [3]- [4]. We denote a fourway bridging fault by (g /a ,h =a ), where g and h are lines and a ∈ {0,1}.…”

“…In Section 2 we demonstrate that the four-way bridging fault model from [3]- [4] is non-robust. For similar reasons, the AND-type and OR-type bridging fault models are also non-robust.…”

A Bridging Fault Model Where Undetectable Faults Imply Logic Redundancy

“…Considering the robust bridging fault model defined in this work and the four-way bridging fault model [3]- [4], we show later that F robust is a subset of F in the sense that targeting faults in F robust implies that four-way bridging faults are being targeted. In this case, there is no waste in test generation effort when considering the faults in F robust .…”