A single-stage power factor correction switched mode power supply

Abstract

This paper presents a single-stage power factor corrected ac-dc converter based on a half-bridge topology. The proposed converter make use of the charge-pump and interleaving techniques resulting in near unity power factor and ripple free input current, meeting the IEC 61000-3-2 regulations for wide-load ranges. It is also a cost effective and competitive solution for 100 -600 W applications where a two stage approach is costly and passive filters are not recommended. It works with zero voltage switching (ZVS) for a reasonable load variation range, achieving higher efficiency at higher load conditions. To overcome the excessive elevation of the Dc-link voltage in lower load situations, a common problem of single-stage PFC solutions, frequency variation and PWM control are used simultaneously.

Ac–dc Serial-interleaved Boost Converter Applied In A Single-stage Pfc

“…Substituting (27) and (28) in (29) as well as the approximations for the voltage across the capacitors C f1 and C f2 given by (19) and (20), results in (30).…”

“…The third alternative consists of mixing variable switching frequency with variable duty-cycle. The idea is to use variable switching frequency to maintain the DC-link voltage under a certain value, when the output power is reduced [20], while the duty-cycle is responsible for regulating the output voltage with the desired dynamic. The use of both the techniques is possible owing to the different dynamic responses of the PFC and the DC-DC stages.…”

“…Also, the additional converter and its control circuitry lead to high cost for lowpower applications [4]. Over the past years, single-stage PFC solutions have been developed [3]- [20] as an attempt to overcome these drawbacks.…”

“…By substituting (17) and (18) in (1), the peak voltages across the input capacitors C f1 and C f2 are given by (19) and (20)…”

“…Equations (19) and (20) demonstrate the dependence of the voltage across the capacitors with parameter . In addition, there is a limit for at each duty-cycle D that guaranties voltages higher than zero across the capacitors, given by (21) (…”