2020
DOI: 10.1109/lssc.2020.3010822
|View full text |Cite
|
Sign up to set email alerts
|

A Single-Electron Injection Device for CMOS Charge Qubits Implemented in 22-nm FD-SOI

Abstract: This brief presents a single-electron injection device for position-based charge qubit structures implemented in 22 nm FD-SOI CMOS. Quantum dots are implemented in local well areas separated by tunnel barriers controlled by gate terminals overlapping with a thin 5 nm undoped silicon film. Interface of the quantum structure with classical electronic circuitry is provided with single-electron transistors that feature doped wells on the classic side. A small 0.7×0.4 µm 2 elementary quantum core is co-located with… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
4
1

Citation Types

0
25
0

Year Published

2020
2020
2024
2024

Publication Types

Select...
6
1

Relationship

2
5

Authors

Journals

citations
Cited by 27 publications
(28 citation statements)
references
References 11 publications
0
25
0
Order By: Relevance
“…Fig. 1 presents an overview of the CMOS position-based charge qubit structure containing an array of QDs [9], [11], [12], with schematics of nearby interfacing circuitry: reset, control, singleelectron injector, and detector. It is part of a quantum processor implemented in 22-nm FDSOI CMOS and operating at cryogenic temperature of 3.4 K, whose earlier version was presented in [10].…”
Section: A Imposer/injector Topologymentioning
confidence: 99%
See 3 more Smart Citations
“…Fig. 1 presents an overview of the CMOS position-based charge qubit structure containing an array of QDs [9], [11], [12], with schematics of nearby interfacing circuitry: reset, control, singleelectron injector, and detector. It is part of a quantum processor implemented in 22-nm FDSOI CMOS and operating at cryogenic temperature of 3.4 K, whose earlier version was presented in [10].…”
Section: A Imposer/injector Topologymentioning
confidence: 99%
“…Our proposed quantum processor unit (QPU) uses on-chip interface circuitry to electrostatically set the quantum states of position-based charge qubits in accordance with a given quantum algorithm [9]- [12]. These proposed quantum states are controlled by adjusting potential barriers between quantum dots (QDs) to establish, via tunneling and entanglement, the intended functions of quantum gates.…”
Section: Introductionmentioning
confidence: 99%
See 2 more Smart Citations
“…In this paper, we have chosen an example of a quantum dot array recently implemented in a CMOS technology together with their interface electronics [22], [35]. We propose and discuss in detail a modeling methodology particularly focused on the side of the problem that may be appealing to readers with background in circuit design.…”
Section: Introductionmentioning
confidence: 99%