A Simulated and Experimental Comparison of Lead-Free and Tin-Lead Solder Interconnect Failure Under Impact Stimuli

Abstract

There is considerable reported evidence that a large percentage of failures which afflict portable electronic products are due to impact or shock during use. Failures of the external housing, internal electronic components, package-to-board interconnects, and liquid crystal display panels may occur as the result of accidental drops. Moreover, the introduction of lead-free solder to the electronics industry will bring additional design implications for future generations of mobile electronic systems. In this paper, drop tests performed on PCBs populated with ball grid arrays (BGAs) are reported. During testing, measurements from strain gages were recorded using a high-speed data acquisition system. Electrical continuity through each package was monitored during the impact event in order to detect failure of package-to-board interconnects. Life distributions were established for both a lead-free and a tin-lead solder for various drop heights. In addition, failure analysis was carried out using microsection techniques, scanning electron microscopy (SEM), and energy dispersive spectroscopy (EDS). Resistance measurements throughout the drop event indicated that different failure mechanisms occurred for different drop heights. The explicit finite element (FE) method was employed to evaluate the peel stress at the critical solder joint and a stress-life model is then established for the lead-free solder. The maximum peel stress location was found to match the location of failure initiation revealed from the failure analysis. It was also discovered that, for board level drop testing, that there is a considerable difference between the lead-free solder characteristic life and the tin-lead solder characteristic life.

An experimental approach to characterize rate-dependent failure envelopes and failure site transitions in surface mount assemblies

“…It has also been shown that the changes in the intermetallic morphology and the growth of Kirkendall voids due to thermal aging in SAC/OSP packages can lead to a transition in the failure site from solder to IMC/Cu interface [20]. For most plating materials, Sn-Pb solders have shown better durability than Pbfree solders [16,26,27].…”

“…Yu et al [15] were the first to report a transition in the failure site from solder to the intermetallic with increasing drop height during drop testing of PWAs. Heaslip et al [16] compared the drop durability of Sn37Pb and Sn95.5Ag3.8Cu0.7 solders and showed that the failure sites and failure mechanisms change with drop height and solder type; while Varghese and Dasgupta conducted high-speed bend tests and showed that the failure site transitions from the solder to the copper trace for specimens with Organic Solderability Preservative (OSP) finish [17,18]; and from the solder to the intermetallic compound (IMC) layer for specimens with Electroless Nickel/Immersion Gold (ENIG) finish [19]. Xu and Pang [20] conducted drop tests on thermally aged PWAs and showed that there were various failure sites even within the IMC layers.…”

Test methodology for durability estimation of surface mount interconnects under drop testing conditions

“…This change in failure site and in the failure mechanism caused the durability to vary non-monotonically with PWA strain rate, although it still varied monotonically with PWA strain amplitude. Heaslip et al [11] compared the drop durability of Sn-Pb and Pb-free solders and showed that the failure sites and failure mechanisms change with drop height and solder type.…”

Failure Mechanisms of Interconnections in Drop Impact

“…al. [12] performed drop impact experiments using resistance monitoring of daisy chains consisting of pairs of solder joints. They reported sudden occurrence of failures over several drops.…”