A simpler 100-V polysilicon TFT with improved turn-on characteristics

2018

Applied Sciences

Polycrystalline silicon (poly-Si) thin film transistors (TFT) with a tri-gate fin-like structure and wide drain were designed and simulated to improve gate-induced drain leakage (GIDL), ON-state current, and breakdown voltage. The GIDL of fin-like TFTs (FinTFTs) examined in this study was dominated by longitudinal band-to-band tunneling (L-BTBT). Extending the wide drain can effectively suppress the longitudinal electric field near the drain and improve L-BTBT GIDL and breakdown. In addition, a wider drain can lead to a large cross section in the current path and improve the ON-state current. FinTFTs with wide drain exhibit a low GIDL, a high ON-state current, and high breakdown voltage, while maintaining favorable gate controllability.

Section: Introductionmentioning

confidence: 99%

Improving the Gate-Induced Drain Leakage and On-State Current of Fin-Like Thin Film Transistors with a Wide Drain

Zeng

2018

Applied Sciences

“…In the FID structure, a field-plate (or sub-gate) is employed to induce electrical drain extension. [7][8][9] The on current is therefore not significantly affected if an appropriate bias is applied on the field-plate. 7,8) Moreover, unlike the LDD approach, the FID structure does not suffer from implant damage in the offset source/drain region.…”

Section: Introductionmentioning

confidence: 99%

Characteristics of Polycrystalline Silicon Thin-Film Transistors with Electrical Source/Drain Extensions Induced by a Bottom Sub-Gate

Lin

et al. 2002

Jpn. J. Appl. Phys.

Characteristics of polycrystalline silicon thin-film transistors (TFT) with source/drain extensions induced by a bottom sub-gate were explored, high on/off current ratio up to 10 7 could be achieved for both n-and p-channel devices. Nevertheless, the performance is significantly degraded by a marked increase of off-state leakage current when the channel length is scaled below 1 m. Moreover, a hump in the subthreshold current-voltage regime is observed. After careful analysis, it is found that the leakage current is strongly dependent on the field strength and is not a thermally activated process. A leakage path along the bottom interface of the poly-Si channel layer is proposed to explain these results.

“…Within MFP structures the field peak can be located at either the drain or gate end of the offset region and the exact position is dependent upon the magnitude of the applied biases. 8 Within the OD structure the high field regions are again located at the edges of the offset region and arise from the depletion formed between the sharp corner of the gate ͑which is held at low potential͒ and the high drain potential. 13 The high field regions in OD and MFP structures typically result in oxide failure.…”

mentioning

confidence: 99%

Polycrystalline silicon thin film transistor incorporating a semi-insulating field plate for high voltage circuitry on glass

Clough

Narayanan

Applied Physics Letters

et al. 1997