A Simple and Effective Heuristic Method for Threshold Logic Identification

Neutzling, Augusto; Martins, Mayler G. A.; Callegaro, Vinicius; Reis, André I.; Ribas, Renato P.

doi:10.1109/tcad.2017.2729403

Cited by 10 publications

(4 citation statements)

References 24 publications

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“…Many TLF identification algorithms are based on integer-linear-programming (ILP) [15,16,16,17,18,29]. In [30], on the other hand, a complete system of inequalities is built using a similar strategy to ILP inequalities generation algorithms. However, unlike ILPbased approaches, the inequalities system is not solved.…”

Section: A Terms and Definitionsmentioning

confidence: 99%

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Logic Synthesis for Emerging Technologies

Neutzling¹,

Ribas²

2021

JICS

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Emerging technologies are being considered to replace the conventional CMOS-based design that seems arriving to its end of life due to the limits of MOS transistor shrinking. However, since those novel devices are not necessarily switch-based ones, the traditional AND/OR logic synthesis process in the digital integrated circuit design flow tends to become inefficient, whereas threshold logic paradigm seems to be more appropriate for them. In this context, different methods for threshold logic synthesis, suitable for emerging technologies, are reviewed in this paper. The majority logic based design is also discussed herein since it represents a subset of threshold logic domain, and many new technologies have presented the 3-input majority Boolean function as the most basic logic gate. Experimental data, presented in previous works, are used to illustrate and compare the performance of the state-ofthe-art logic synthesis methods related to

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Section: A Terms and Definitionsmentioning

confidence: 99%

“…Such a strategy has resulted in fast runtime and good quality of results (QoR). In a more recent work, in [31], the authors proposes a new necessary condition and the corresponding speedup strategies to the threshold function identification problem, claiming to obtain TLFs not found by the method presented in [30].…”

Section: A Terms and Definitionsmentioning

confidence: 99%

Logic Synthesis for Emerging Technologies

Neutzling¹,

Ribas²

2021

JICS

Self Cite

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“…A n-variables Boolean function may be represented canonically in a sum-of-products form as [10], [11] f…”

Section: Preliminaries a Rm Expressionmentioning

confidence: 99%

A Novel Logic Detection Algorithm for Logic Circuits

Liu

Zhang

et al. 2019

IEEE Access

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Synthesizing logic circuits with different logic will result in different circuit structure, and then obtain different circuit performance. However, few studies have focused on logic detection technology that detects which logic is appropriate for the implementation of logic circuits. In this paper, we use Reduced Ordered Binary Decision Diagram (ROBDD) processed by dynamic variable sorting approach to describe logic circuits. Moreover, based on the proposed XOR logic judging condition and logic detection judging condition, we propose a Novel Logic Detection Algorithm (NLDA), which can quickly and effectively detect which logic is appropriate for the implementation of logic circuits. The experimental results on MCNC benchmark circuits show that compared to the logic detection algorithm based on minterms, the logic detection algorithm based on product terms, and the logic detection algorithm based on disjointed cubes, NLDA has the highest logic detection accuracy rate and highest logic detection efficiency.

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“…The weights and thresholds are determined by an integer linear programming algorithm that finds the optimal solution considering the constraints of the truth table (see Figure S5 in Supporting Information). ,, Afterward, the determined weights and thresholds are changed into differential conductance pairs within the programmable range of the memristor by the algorithm explained in Figure c. First, the integer threshold is adjusted by 0.5 to have tolerance for weight programming inaccuracies and noisy signals (steps 7–9).…”

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confidence: 99%

Programmable Threshold Logic Implementations in a Memristor Crossbar Array

Youn,

Lee,

Kim

et al. 2024

Nano Lett.

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In this study, we demonstrate the implementation of programmable threshold logics using a 32 × 32 memristor crossbar array. Thanks to forming-free characteristics obtained by the annealing process, its accurate programming characteristics are presented by a 256-level grayscale image. By simultaneous subtraction between weighted sum and threshold values with a differential pair in an opposite way, 3-input and 4-input Boolean logics are implemented in the crossbar without additional reference bias. Also, we verify a full-adder circuit and analyze its fidelity, depending on the device programming accuracy. Lastly, we successfully implement a 4-bit ripple carry adder in the crossbar and achieve reliable operations by read-based logic operations. Compared to stateful logic driven by device switching, a 4-bit ripple carry adder on a memristor crossbar array can perform more reliably in fewer steps thanks to its read-based parallel logic operation.

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A Simple and Effective Heuristic Method for Threshold Logic Identification

Cited by 10 publications

References 24 publications

Logic Synthesis for Emerging Technologies

Logic Synthesis for Emerging Technologies

A Novel Logic Detection Algorithm for Logic Circuits

Programmable Threshold Logic Implementations in a Memristor Crossbar Array

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