2020 33rd International Conference on VLSI Design and 2020 19th International Conference on Embedded Systems (VLSID) 2020
DOI: 10.1109/vlsid49098.2020.00031
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A Shared-Memory Parallel Implementation of the RePlAce Global Cell Placer

Abstract: RePlAce is a state-of-the-art prototype of a flat, analytic, and nonlinear global cell placement algorithm, which models a placement instance as an electrostatic system with positively charged objects. It can handle large-scale standard-cell and mixed-cell placement, while achieving shorter wirelength and similar or shorter runtimes than other state-of-the-art placers on the ISPD-2005/2006 standard-cell benchmarks; however, the runtime of RePlAce on these benchmarks ranges from 15 minutes to 5+ hours on a 2.6 … Show more

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