ILP-Based Global Routing Optimization with Cell Movements

Fontana, Tiago Augusto; Aghaeekiasaraee, Erfan; Netto, Renan; Almeida, Sheiny Fabre; Gandh, Upma; Tabrizi, Aysa Fakheri; Westwick, David T.; Behjat, Laleh; Güntzel, José Luís

doi:10.1109/isvlsi51109.2021.00016

Cited by 9 publications

(2 citation statements)

References 14 publications

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“…SRP [19] considers routing and placement simultaneously based on a given placement and global routing result to relocate cells that obstruct routability. The work [20] proposes an ILP-based cell movement to move cells and route nets at the same time after global routing. In the work, it chooses the median point of all the cells in the connected nets as the candidate location, and constructs the integer linear programming (ILP) model according to the possible routings.…”

Section: Previous Workmentioning

confidence: 99%

Detailed Placement and Global Routing Co-Optimization with Complex Constraints

Huang

Shi

et al. 2021

Electronics

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With several divided stages, placement and routing are the most critical and challenging steps in VLSI physical design. To ensure that physical implementation problems can be manageable and converged in a reasonable runtime, placement/routing problems are usually further split into several sub-problems, which may cause conservative margin reservation and mis-correlation. Therefore, it is desirable to design an algorithm that can accurately and efficiently consider placement and routing simultaneously. In this paper, we propose a detailed placement and global routing co-optimization algorithm while considering complex routing constraints to avoid conservative margin reservation and mis-correlation in placement/routing stages. Firstly, we present a rapidly preprocessing technology based on R-tree to improve the initial routing results. After that, a BFS-based approximate optimal addressing algorithm in 3D is designed to find a proper destination for cell movement. We propose an optimal region selection algorithm based on the partial routing solution to jump out of the local optimal solution. Further, a fast partial net rip-up and rerouted algorithm is used in the process of cell movement. Finally, we adopt an efficient refinement technique to reduce the routing length further. Compared with the top 3 winners according to the 2020 ICCAD CAD contest benchmarks, the experimental results show that our algorithm achieves the best routing length reduction for all cases with a shorter runtime. On average, our algorithm can improve 0.7%, 1.5%, and 1.7% for the first, second, and third place, respectively. In addition, we can still obtain the best results after relaxing the maximum cell movement constraint, which further illustrates the effectiveness of our algorithm.

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Section: Previous Workmentioning

confidence: 99%

Detailed Placement and Global Routing Co-Optimization with Complex Constraints

Huang

Shi

et al. 2021

Electronics

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“…Therefore, the effects of a bad placement solution can be amplified during routing to the extent that the circuit placement is deemed unroutable and the placement needs to be redone. To mitigate such problems, some recent works have enabled changes in cells' placements during the routing [9], [10], [11], and [12]. Such a procedure is currently referred to as routing with cell movement problem.…”

Section: Introductionmentioning

confidence: 99%

ILPGRC: ILP-Based Global Routing Optimization With Cell Movements

Fontana¹,

Aghaeekiasaraee²,

Netto³

et al. 2024

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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The placement and routing steps directly impact the circuit performance, area, power consumption, and reliability. To handle the high complexity of modern circuits, these steps are tackled separately by applying a divide-and-conquer approach. Unfortunately, due to the continuous increase of design rules complexity, the convergence of solutions can suffer from misalignment, and the effects of an unsatisfactory placement will be noticed only during routing when the placement is considered fixed. In this work, we propose the ILPGRC, an Integer Linear Programming (ILP)-based technique that simultaneously moves cells and routes nets to optimize Global Routing. ILPGRC enables the relocation of cells that can lead to routing issues without compromising the quality concerning the number of VIAs, wirelength, and Design Rule Violations (DRVs). We also propose a partitioning strategy named Checkered paneling, which reduces the input size of the ILP model, making this approach scalable. The Checkered paneling strategy enables the execution of multiple ILP models in parallel, providing a speedup for large circuits. Additionally, we propose a GCell cluster-based approach to legalize the solution with minimum disturbance and displacement. We evaluated our technique for the ISPD 2018 and ISPD 2019 Contests circuits within a physical synthesis flow composed of state-of-the-art place and route academic tools. The results after the detailed routing show that ILPGRC can reduce, on average, the number of VIAs by 4.69% with less than 1% impact on wirelength. Additionally, ILPGRC reduces the number of DRVs in most cases with no open nets left.

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