2021
DOI: 10.1063/5.0036639
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A semiconductor physics based model for thermal characteristics in electronic electrolytic energy storage devices

Abstract: A model for ultracapacitor capacitance and ion screening length based on semiconductor physics is presented in this paper. Screening length is related to capacitance as the plate-plate separation in a double-layer, and thus both are related to dissolved ion density in the electrolyte. Furthermore, this dissolved ion density can be expressed in terms of an effective bandgap assigned to the electrolyte/solvent pair. Therefore, by knowing the effective bandgap, we can explain the published experimental measuremen… Show more

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Cited by 3 publications
(3 citation statements)
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“…The Vth of the MIS-HEMT with SiNx/SiON composite gate dielectric exhibited a negative shift of 0.5 V, whereas the Vth of the MIS-HEMT with SiNx only gate dielectric showed a negative shift of 0.62 V. The negative shift after the OFF-state stress indicates an electron releasing process from the traps to the 2DEG channel resulting in the recovery of the Vth [12]. To clarify the trapping and detrapping process causing the shift of the V th , the band diagrams of the MIS-HEMTs at the gate region are depicted in Figure 4 [30]. At thermal equilibrium, traps at the interface below the Fermi level are filled with electrons, whereas traps above the Fermi level are empty [19].…”
Section: Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…The Vth of the MIS-HEMT with SiNx/SiON composite gate dielectric exhibited a negative shift of 0.5 V, whereas the Vth of the MIS-HEMT with SiNx only gate dielectric showed a negative shift of 0.62 V. The negative shift after the OFF-state stress indicates an electron releasing process from the traps to the 2DEG channel resulting in the recovery of the Vth [12]. To clarify the trapping and detrapping process causing the shift of the V th , the band diagrams of the MIS-HEMTs at the gate region are depicted in Figure 4 [30]. At thermal equilibrium, traps at the interface below the Fermi level are filled with electrons, whereas traps above the Fermi level are empty [19].…”
Section: Resultsmentioning
confidence: 99%
“…To clarify the trapping and detrapping process causing the shift of the Vth, the band diagrams of the MIS-HEMTs at the gate region are depicted in Figure 4 [30]. At thermal equilibrium, traps at the interface below the Fermi level are filled with electrons, whereas traps above the Fermi level are empty [19].…”
Section: Resultsmentioning
confidence: 99%
“…However, in the illuminated condition, the Fermi level splitting occurs, and EFn is raised while EFp is lowered. This results in more electrons and holes being excited in the i-Ge region [28,29]. Finally, the generated electrons are accelerated in the i-Si multiplication region under high reverse voltage conditions.…”
mentioning
confidence: 99%