2022
DOI: 10.3390/electronics11060895
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Low Threshold Voltage Shift in AlGaN/GaN MIS-HEMTs on Si Substrate Using SiNx/SiON as Composite Gate Dielectric

Abstract: This study has demonstrated AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs) on Si substrates with a SiNx/SiON composite gate dielectric. The threshold voltage shift in the devices was investigated. The MIS-HEMTs with the SiNx/SiON composite gate dielectric exhibited superior threshold voltage uniformity and small threshold voltage hysteresis than the reference device with SiNx only gate dielectric. The variation of the device threshold voltage was mainly related to trappi… Show more

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Cited by 5 publications
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“…Figure 2c shows the transfer curves by sweeping V TG forward and backward, revealing negligible hysteresis with memory window of only 30 mV in the subthreshold region, which is comparable with the presently advanced GaN‐high electron mobility transistor (HEMT) and MoS 2 ‐multi bridge channel FET(MBCFET). [ 24,56,57 ] This ultra‐low hysteresis can be probably attributed to the junction‐controlled mechanism, circumventing the negative effects of charge trapping at channel/dielectric interface that is usually existing in planar FETs. [ 58 ] We further extract the SS of the device as shown in Figure 2d and Figure S7 (Supporting Information), which is defined as SS0.33em=0.33emVTGlogIDS$SS\ = \ \frac{{\partial {V}_{TG}}}{{\partial \log {I}_{DS}}}$.…”
Section: Resultsmentioning
confidence: 99%
“…Figure 2c shows the transfer curves by sweeping V TG forward and backward, revealing negligible hysteresis with memory window of only 30 mV in the subthreshold region, which is comparable with the presently advanced GaN‐high electron mobility transistor (HEMT) and MoS 2 ‐multi bridge channel FET(MBCFET). [ 24,56,57 ] This ultra‐low hysteresis can be probably attributed to the junction‐controlled mechanism, circumventing the negative effects of charge trapping at channel/dielectric interface that is usually existing in planar FETs. [ 58 ] We further extract the SS of the device as shown in Figure 2d and Figure S7 (Supporting Information), which is defined as SS0.33em=0.33emVTGlogIDS$SS\ = \ \frac{{\partial {V}_{TG}}}{{\partial \log {I}_{DS}}}$.…”
Section: Resultsmentioning
confidence: 99%