A self-aligned pocket implantation (SPI) technology for 0.2- mu m dual-gate CMOS

Hori, Atsushi; Segawa, M.; Shimomura, H.; Kameyama, S.

doi:10.1109/55.145011

Search citation statements

Order By: Relevance

Paper Sections

Select...

Introduction1

Citation Types

Supporting

Mentioning

Contrasting

Year Published

2003

2020

Publication Types

Select...

Article5

Relationship

Self Cite0

Independent5

Authors

Journals

Cited by 17 publications

(1 citation statement)

References 8 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Boron pocket implantation has been reported to effectively improve MOSFET performance in Refs. [5][6][7]. In the past years, the reverse SCEs (RSCEs) of boron pocket-implanted MOSFETs have been extensively studied from an experimental or analytical approach.…”

Section: Introductionmentioning

confidence: 99%

Two-dimensional subthreshold current model for dual-material gate SOI nMOSFETs with single halo

Luan

Liu

Jia

et al. 2008

Front. Electr. Electron. Eng. China

View full text Add to dashboard Cite

A two-dimensional (2D) model for the subthreshold current in the dual-material gate (DMG) siliconon-insulator (SOI) MOSFET with a single halo is presented. The model considers single halo doping in the channel near the source and a dual-material gate to derive the channel potential using the explicit solution of the 2D Poisson's equation. Together with the conventional driftdiffusion theory, this results in the development of a subthreshold current model for the novel structure. Model verification is carried out using the 2D device simulator ISE. Excellent agreement is obtained between the calculations and the simulated results of the model.

show abstract

Section: Introductionmentioning

confidence: 99%