A Room Temperature Ballistic Deflection Transistor for High Performance Applications

Abstract

The Ballistic Deflection Transistor (BDT) is a novel device that is based upon an electron steering and a ballistic deflection effect. Composed of an InGaAs-InAlAs heterostructure on an InP substrate, this material system provides a large mean free path and high mobility to support ballistic transport at room temperature. The planar nature of the device enables a two step lithography process, as well, implies a very low capacitance design. This transistor is unique in that no doping junction or barrier structure is employed. Rather, the transistor utilizes a two-dimensional electron gas (2DEG) to achieve ballistic electron transport in a gated microstructure, combined with asymmetric geometrical deflection. Motivated by reduced transit times, the structure can be operated such that current never stops flowing, but rather is only directed toward one of two output drain terminals. The BDT is unique in that it possesses both a positive and negative transconductance region. Experimental measurements have indicated that the transconductance of the device increases with applied drainsource voltage. DC measurements of prototype devices have verified small signal voltage gains of over 150, with transconductance values from 45 to 130 mS/mm depending upon geometry and bias. Gate-channel separation is currently 80nm, and allows for higher transconductance through scaling. The six terminal device enables a normally differential mode of operation, and provides two drain outputs. These outputs, depending on gate bias, are either complementary or non-complementary. This facilitates a wide variety of circuit design techniques. Given the ultralow capacitive design, initial estimates of f t , for the device fabricated with a 430nm gate width, are over a THz.

Magneto-ballistic transport in GaN nanowires

“…Ballistic transport has been exploited for new kinds of electronic devices such as ballistic rectifiers and artificial functional materials, 2 ballistic deflections transistors, 3 and logic gates using quantum point contacts.…”

Performance optimization of room temperature Deflection Transistors through modified geometry

“…The substrate consists of a lattice matched layers of InGaAs and InAlAs on an InP substrate [6]. In Figures 2 and 3, a scanning electron microscope (SEM) image of the BDT structure with 100nm and 1µm scale indicators are shown.…”

Monte Carlo Simulation of Room Temperature Ballistic Nanodevices

“…Similar effects take place in ballistic rectifying devices achieved by inserting an obstacle (antidot) of triangular or diamond shape in the centre of a ballistic cross junction [Song et al, 1998;Song et al, 2001González et al, 2004]. This type of geometry has also recently been improved by attaching two strategically placed in-plane gates for the fabrication of the so called Ballistic Deflection Transistors (BDT) [Wesström, 1999;Hieke & Ulfward 2000;Diduck et al, 2009;Kaushal et al, 2010]. Ultrafast rectifying nano-diodes, named Self-Switching Diodes (SSDs) [Fig.…”