A Robust Single-Phase PLL System With Stable and Fast Tracking

Shinnaka, Shinji

doi:10.1109/tia.2008.916750

Cited by 105 publications

(59 citation statements)

References 13 publications

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“…The Phase Lock Loop (PLL) is a control system designed to generate the reference output signals related to the input signals for each phase. There are different types of PLL methods in the world of electronic and communication system [1][2][3][4][5][6][7][16][17][18][19][20][21][22][23][24][25][26]. These PLL control systems are designed according to variable frequency and signal phase detector in feedback signals loop, PLL filtering technique, and PLL prefiltering technique.…”

Section: Related Work Reviewmentioning

confidence: 99%

A New Synchronization Technique of a Three-Phase Grid Tied Inverter for Photovoltaic Applications

Mnati

Bozalakov

Bossche

2018

Mathematical Problems in Engineering

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Three-phase grid synchronization is one of the main techniques of the three-phase grid connected power inverters used in photovoltaic systems. This technique was used to reach the fast and accurate three-phase grid tied inverter synchronization. In this paper a new synchronization method is presented on the basis of integrating the grid voltage two times (line-to-line or phase voltage). This method can be called "double integral synchronization method" (DISM) as it integrates the grid voltage signals two times to generate the reference signals of three-phase photovoltaic inverter currents. DISM is designed and simulated in this paper to operate in both analog and digital circuits of three-phase photovoltaic inverter system with the same topology. The digital circuit design and dsPIC33FJ256GP710A as a microcontroller (the dsPIC33FJ256GP710A with the Explorer 16 Development Board from microchip) was used practically in this paper to generate and control the sine pulse width modulation (SPWM) technique according to DISM for three-phase photovoltaic inverter system. The main advantage for this method (DISM) is learning how to eliminate the integration constant to generate the reference signals without needing any reference signals or truth table, just the line-to-line or phase voltage of grid.

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Section: Related Work Reviewmentioning

confidence: 99%

A New Synchronization Technique of a Three-Phase Grid Tied Inverter for Photovoltaic Applications

Mnati

Bozalakov

Bossche

2018

Mathematical Problems in Engineering

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“…[23][24][25][26]). The Enhanced PLL (EPLL) contains an adaptive notch filter and provides a higher degree of insensitivity to variable-frequency input signals.…”

Section: Case Studies 121 Synchronization With Line Voltagementioning

confidence: 99%

Rapid algorithm prototyping and implementation for power quality measurement

Kołek

Piątek

2015

EURASIP J. Adv. Signal Process.

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This article presents a Model-Based Design (MBD) approach to rapidly implement power quality (PQ) metering algorithms. Power supply quality is a very important aspect of modern power systems and will become even more important in future smart grids. In this case, maintaining the PQ parameters at the desired level will require efficient implementation methods of the metering algorithms. Currently, the development of new, advanced PQ metering algorithms requires new hardware with adequate computational capability and time intensive, cost-ineffective manual implementations. An alternative, considered here, is an MBD approach. The MBD approach focuses on the modelling and validation of the model by simulation, which is well-supported by a Computer-Aided Engineering (CAE) packages. This paper presents two algorithms utilized in modern PQ meters: a phase-locked loop based on an Enhanced Phase Locked Loop (EPLL), and the flicker measurement according to the IEC 61000-4-15 standard. The algorithms were chosen because of their complexity and non-trivial development. They were first modelled in the MATLAB/Simulink package, then tested and validated in a simulation environment. The models, in the form of Simulink diagrams, were next used to automatically generate C code. The code was compiled and executed in real-time on the Zynq Xilinx platform that combines a reconfigurable Field Programmable Gate Array (FPGA) with a dual-core processor. The MBD development of PQ algorithms, automatic code generation, and compilation form a rapid algorithm prototyping and implementation path for PQ measurements. The main advantage of this approach is the ability to focus on the design, validation, and testing stages while skipping over implementation issues. The code generation process renders production-ready code that can be easily used on the target hardware. This is especially important when standards for PQ measurement are in constant development, and the PQ issues in emerging smart grids will require tools for rapid development and implementation of such algorithms.

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“…To the best of the authors' knowledge, Shinnaka [11], for the first time, proposed a type-3 PLL for power grid applications. This PLL, referred to as the robust-PLL (here, called RPLL), is shown in Fig.…”

Section: Different Approaches To Realize a Type-3 Pllmentioning

confidence: 99%

“…Therefore, including additional LPF(s) in the control loop of a type-3 PLL (which causes extra phase roll-off) may not be a good idea, unless its (their) cut-off frequency is (are) far above the gain-crossover frequency of the PLL. The experimental results presented in [11] show that, the RPLL transient response is highly oscillatory, which implies it suffers from very limited stability margins.…”

Section: Different Approaches To Realize a Type-3 Pllmentioning

confidence: 99%

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Advantages and Challenges of a Type-3 PLL

Golestan

Monfared

Freijedo

et al. 2013

IEEE Trans. Power Electron.

118

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Abstract-A phase-clocked loop (PLL) is a closed-loop feedback control system which synchronizes its output signal in frequency as well as in phase with an input signal. The phase detector, the loop filter, and the voltage controlled oscillator are the key parts of almost all PLLs. Within the areas of power electronics and power systems, which are focused on in this paper, the PLLs typically employ a proportional-integral controller as the loop filter, resulting in a type-2 control system (a control system of type-N has N poles at the origin in its open-loop transfer function). Recently, some attempts have been made to design type-3 PLLs, either by employing a specific second-order controller as the loop filter, or by implementing two parallel tracking paths for the PLL. For this type of PLLs, however, the advantages and limitations are not clear at all, as the results reported in different literature are contradictory, and there is no detailed knowledge about their stability and dynamic characteristics. In this paper, different approaches to realize a type-3 PLL are examined first. Then, a detailed study of dynamics and analysis of stability, followed by comprehensive parameters design guidelines for a typical type-3 PLL are presented. Finally, to get insight into the advantages/limitations of this type of PLLs, the performance of a well-tuned type-3 PLL is compared with a conventional synchronous reference frame PLL (which is a type-2 PLL) through extensive experimental results and some theoretical discussions.

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A Robust Single-Phase PLL System With Stable and Fast Tracking

Cited by 105 publications

References 13 publications

A New Synchronization Technique of a Three-Phase Grid Tied Inverter for Photovoltaic Applications

A New Synchronization Technique of a Three-Phase Grid Tied Inverter for Photovoltaic Applications

Rapid algorithm prototyping and implementation for power quality measurement

Advantages and Challenges of a Type-3 PLL

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