A review: wafer bonding of Si-based semiconductors

Abstract

Wafer bonding techniques, which are very different from epitaxial growth techniques, can be used not only for the fabrication of micro-electromechanical systems (MEMS), silicon on insulator (SOI), and Si-based device integration, but have recently been applied to the achievement of high-quality homojunctions and heterojunctions in the photoelectric field. That is, carrier transport at the interface of the wafer-bonded junction should be unimpeded and carrier recombination at the bonded interface should be restrained. For Si/Si wafer bonding, although a high bonding strength and a bubble-free bonded interface are needed for the fabrication of the MEMS and SOI, a perfect Si/Si bonded interface which is expected to be bubble-free, oxide-layer-free, and dislocation-free is needed for the achievement of high-performance photoelectric devices, such as Ge/Si single-photon avalanche photodiodes. On the other hand, for Ge/Si heterogeneous hybrid integration (high lattice mismatch), threading dislocations (TDs) in the Ge film can be eliminated by low-temperature heterogeneous wafer bonding, due to the lower diffusion rate of misfit dislocations (MDs) at the Ge/Si bonded interface. This is very different from epitaxial growth, in which high-density TDs form in the integrated Ge layer due to the threading of MDs at high-temperature. In this paper, we review the wafer bonding of Si-based semiconductors based on different bonding methods. The advantages and disadvantages of different bonding methods are pointed out for comparison. We focus on the illustration of the fabrication of Si/Si and Ge/Si wafer pairs with TD-free, bubble-free, and oxide-layer-free bonded interfaces. Finally, the outlook for the development of Si/Si and Ge/Si wafer bonding and devices based on the wafer bonding technique is considered. We trust that this work may provide guidance for the low-temperature heterogeneous hybrid integration of different group materials with ultrahigh lattice mismatch, such as GeSn on Si and III-V materials on Si.

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