A review on modulation techniques in multiband-orthogonal frequency division multiplexing in ultra-wideband channel

In this article, equivalent circuit modeling with study and analysis of band notch characteristics for a triple band notched UWB antenna has been discussed to develop a better understanding of the antenna functioning and its behavior. A small square ultra wideband antenna having overall size of 24 x 31 mm 2 with tri-band rejections is designed and simulated using HFSS software. Very narrow band notching is accomplished by placing C slots and inverted C slot of different dimensions on the radiating patch which makes maximum space utilization without performance deterioration. The antenna operates from 3.1 to 14 GHz (VSWR < 2) with the presence of 3 narrow band notches (VSWR >2) of 3.3-3.7 GHz (WiMAX), 5.1-5.4 GHz (Lower WLAN and HIPERLAN/2) and 5.7-6 GHz (Upper WLAN) as shown by the simulated and measured results (VSWR<2) of the UWB antenna, with and without the presence of triple notches, thus utilizing the maximum UWB bandwidth. The radiation pattern plots for simulated and measured results are also presented to validate the working of the antenna. This antenna can be a respectable candidate for future European and USA high capacity UWB applications. The group delay and peak gain plots are also found to be stable in the range of operation of the antenna. The study and analysis of the band notching is discoursed in terms of current distribution and impedance plots to provide a greater and better perception into the working of the antenna and hence an equivalent circuit for the tri-band notched UWB antenna has been proposed.

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“…The MB-OFDM format has 14 subintervals in the interval between 3.1 and 10.6 GHz. Each subinterval covers 528 MHz of bandwidth [21].…”

Section: A Voltage Standing Wave Ratio (Vswr) Readingsmentioning

confidence: 99%

Parametric study and Analysis of Band Stop Characteristics for a Compact UWB Antenna with Tri-band notches

Ain

Chattoraj

2018

J. Microw. Optoelectron. Electromagn. Appl.

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“…RS-convolutional codes [4], employing concatenated reed solomon codes and convolutional codes, which employs the information available from the channel state estimator to vary the amount of redundancy and its error correcting capability according the state of the channel. LDPC-convolutional codes [5], Low-density parity-check (LDPC) convolutional codes, are capable of achieving excellent performance with low encoding and decoding complexity. On the other hand, lots of researches are investigated on convolutional decodes.…”

Section: Introductionmentioning

confidence: 99%

Design of (2, 1, N) Parallel Convolutional Encodes for VLSI

Duan

Huang

2013

AMM

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Abstract. The characters of more high speed computing and much less low power dissipation are needed to settle for convolutional encodes. In this paper, we present a parallel method for convolutional encodes with SMIC 0.35µm CMOS technology; hardware design and VLSI implementation of this algorithm are also presented. Use this method, parallel circuits structure can be easily designed, which take on excellent characters of more high speed computing and low power dissipation compared with traditional serial shift register structure for convolutional encodes.

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“…RS-convolutional codes [5], employing concatenated reed solomon codes and convolutional codes, which employs the information available from the channel state estimator to vary the amount of redundancy and its error correcting capability according the state of the channel. LDPC-convolutional codes [6], Low-density parity-check (LDPC) convolutional codes, are capable of achieving excellent performance with low encoding and decoding complexity. On the other hand, lots of researches are investigated on convolutional decodes.…”

Section: Introductionmentioning

confidence: 99%

IP Core Design for Parameterized (2,1,N) Convolutional Encodes

Duan

Huang

Yang

2013

AMM

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Abstract. In this paper, we design and implement general parameterized IP (Intellectual Property) cores of convolutional encoder with SMIC 0.35µm CMOS technology, serial structure and parallel structure respectively. And analyze each of the power dissipation using Synopsys PTPX tool. The result shows the parallel circuit structure saves 14 percent power dissipation compared to that of serial circuit structure, with the same encode radio. Meanwhile, computing speed of parallel structure with 8-bit parallelism is 8 times than that of serial structure under the same clock frequency. Certainly, serial circuit structure has their particular characters such as easily realized and less resource consumption.

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A review on modulation techniques in multiband-orthogonal frequency division multiplexing in ultra-wideband channel

Cited by 3 publications

References 58 publications

Parametric study and Analysis of Band Stop Characteristics for a Compact UWB Antenna with Tri-band notches

Parametric study and Analysis of Band Stop Characteristics for a Compact UWB Antenna with Tri-band notches

Design of (2, 1, N) Parallel Convolutional Encodes for VLSI

IP Core Design for Parameterized (2,1,N) Convolutional Encodes

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