A Review, Classification, and Comparative Evaluation of Approximate Arithmetic Circuits

Abstract

Often as the most important arithmetic modules in a processor, adders, multipliers, and dividers determine the performance and energy efficiency of many computing tasks. The demand of higher speed and power efficiency, as well as the feature of error resilience in many applications (e.g., multimedia, recognition, and data analytics), have driven the development of approximate arithmetic design. In this article, a review and classification are presented for the current designs of approximate arithmetic circuits including adders, multipliers, and dividers. A comprehensive and comparative evaluation of their error and circuit characteristics is performed for understanding the features of various designs. By using approximate multipliers and adders, the circuit for an image processing application consumes as little as 47% of the power and 36% of the power-delay product of an accurate design while achieving similar image processing quality. Improvements in delay, power, and area are obtained for the detection of differences in images by using approximate dividers.

ADAC: Automated Design of Approximate Circuits

“…2 correspond to circuits with different trade-offs between WCE in % and the power-delay product (PDP 2 ), which is a key non-functional circuit characteristic. These circuits were obtained using various existing approaches including: (M1) configurable circuits from the lpACLib library [17], (M2) the bit-significance-driven logic compression [15], (M3) the bit-width truncation [10], (M4) compositional techniques [11], and (M5) circuits from the EvoApproxLib library [13]. We can see that just the bit-width truncation can provide a quality of results comparable with ADAC (in terms of the PDP reduction for the given WCE), but for large target errors (20% WCE or more) only.…”

Approximate FPGA Implementation of CORDIC for Tactile Data Processing Using Speculative Adders

“…Among numerous speculative adders [24], the Inexact Speculative Adder (ISA) [22] is a general and optimum architecture of speculative addition to improve speed, power efficiency and accuracy management thanks to a short speculative path and to an adaptable double-direction error compensation mechanism. This technique allows to precisely control mean and maximum errors.…”

Approximate Circuits in Low-Power Image and Video Processing: The Approximate Median Filter

“…While the aim of general-purpose approximation methods (e.g. SALSA [9], AXILOG [10], ASLAN [11], ABA-CUS [12], CGP [2], [3]) is to automatically approximate any circuit regardless of its structure, the circuit-specific methods are focused on a rather specific class of circuits (such as adders or multipliers [4]). …”

“…The objective is to create a general-purpose library of approximate implementations showing different trade-offs between power consumption and error. Jiang et al [4] provided a detailed survey of approaches developed in this direction. In this paper, we will deal with approximate adders or multipliers only if they have been applied in an approximate implementation of image or video processing system.…”

“…Unfortunately, the quality of approximation methods has been compared in the literature only rarely (see a survey of associated methodological problems in [2]); in most cases only parameters of approximate adders and multipliers were compared [4]. In this paper, we compare two approximation strategies based on CGP applied to approximate various common implementations of the median filter.…”