ADAC: Automated Design of Approximate Circuits

Abstract

Abstract. Approximate circuits with relaxed requirements on functional correctness play an important role in the development of resourceefficient computer systems. Designing approximate circuits is a very complex and time-demanding process trying to find optimal trade-offs between the approximation error and resource savings. In this paper, we present ADAC-a novel framework for automated design of approximate arithmetic circuits. ADAC integrates in a unique way efficient simulation and formal methods for approximate equivalence checking into a search-based circuit optimisation. To make ADAC easily accessible, it is implemented as a module of the ABC tool: a state-of-the-art system for circuit synthesis and verification. Within several hours, ADAC is able to construct high-quality Pareto sets of complex circuits (including even 32-bit multipliers), providing useful trade-offs between the resource consumption and the error that is formally guaranteed. This demonstrates outstanding performance and scalability compared with other existing approaches.

Adaptive verifiability-driven strategy for evolutionary approximation of arithmetic circuits

“…The proposed circuit approximation method was implemented in our tool called ADAC-Automatic Design of Approximate Circuits [18]. ADAC is implemented as a module of ABC [31], a state-of-the-art academic tool for hardware synthesis and verification.…”

“…We have implemented the adaptive strategy in ADAC [18], our tool for automated design of approximate circuits, that is now able to discover complex arithmetic circuits such as 32bit approximate multipliers, 32-bit approximate multiply-and-accumulate (MAC) circuits, and 24-bit dividers providing high quality trade-offs between the approximation error and energy savings. Such circuits have been approximated by a fully-automated approach with guaranteed error bounds for the first time.…”

Approximate Recursive Multipliers Using Low Power Building Blocks

“…Let YE_i be the exact result of the multiplication between the two n-bits operands Ai and Bi such that YE_i = AiBi and let YA_i be the approximated output returned by the investigated inexact multiplier. The error Ei, of each multiplication is given by: (15) While the error distance EDi is defined as:…”

“…It is worth noting that the circuits proposed in this paper are for general purpose applications thus a uniform distribution of the input is considered. However, automated designs [15]- [18] or dedicated circuits previously presented in the literature, could provide better performances for a specific distribution of the input vectors. As it can be observed in Table 3, the proposed circuits are very small and come second only to the OR-based design.…”

“…Software-based approaches have been proposed, that merge the approximated multiplier design in the design flow of the circuit. They automatically generate synthesizable hardware description code for approximate arithmetic circuits based on the accuracy requirement of the design [15]- [18]. Such techniques can prove useful when the targeted application does not have a uniform input distribution.…”