A reversible approach to two’s complement addition using a novel reversible TCG gate and its 4 dot 2 electron QCA architecture

Chaudhuri, Ayan; Sultana, Mahamuda; Sengupta, Diganta; Chaudhuri, Chitrita; Chaudhuri, Atal

doi:10.1007/s00542-018-4042-8

Cited by 6 publications

(2 citation statements)

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“…The basic structural components of QCA based architecture are 3-input majority gate (MV) [5,6], Inverter [7,8] and Array of Cells [9,10]. Besides, the fan-out assumes a significant role in signal splitting for the substantial implementation of QCA arrays [11].…”

Section: Introductionmentioning

confidence: 99%

Synthesis of composite logic gate in QCA embedding underlying regular clocking

et al. 2021

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Quantum-dot Cellular Automata (QCA) has emerged as one of the alternative technologies for current CMOS technology. It has the advantage of computing at a faster speed, consuming lower power, and work at Nano- Scale. Besides these advantages, QCA logic is limited to its primitive gates, majority voter and inverter only, results in limitation of cost-efficient logic circuit realization. Numerous designs have been proposed to realize various intricate logic gates in QCA at the penalty of non-uniform clocking and improper layout. This paper proposes a Composite Gate (CG) in QCA, which realizes all the essential digital logic gates such as AND, NAND, Inverter, OR, NOR, and exclusive gates like XOR and XNOR. Reportedly, the proposed design is the first of its kind to generate all basic logic in a single unit. The most striking feature of this work is the augmentation of the underlying clocking circuit with the logic block, making it a more realistic circuit. The Reliable, Efficient, and Scalable (RES) underlying regular clocking scheme is utilized to enhance the proposed design?s scalability and efficiency. The relevance of the proposed design is best cited with coplanar implementation of 2-input symmetric functions, achieving 33% gain in gate count and without any garbage output. The evaluation and analysis of dissipated energy for both the design have been carried out. The end product is verified using the QCADesigner2.0.3 simulator, and QCAPro is employed for the study of power dissipation.

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Section: Introductionmentioning

confidence: 99%

Synthesis of composite logic gate in QCA embedding underlying regular clocking

et al. 2021

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“…One of the reasons for the popularity of QCA can be attributed to the ease of transformation of the digital designs into valid QCA realizations. The primitive gate for QCA is the Majority Voter, and this gate can be used to realize the primitive gates of Boolean algebra [4] [5]; viz. AND, OR and NOT gate.…”

Section: Introductionmentioning

confidence: 99%

Adiabatic Hamming Code Generator-Checker using 4-Dot-2-Electron Quantum Dot Cellular Automata

Chaudhuri,

Sengupta*,

Chudhuri

2019

IJEAT

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Technological advancements have witnessed rapid regression of Moore’s Law within the past few years. With rising demand for higher clocking speeds, CMOS has already started exhibiting threshold limitations. Reversible Logic has emerged as a suitable alternative with near zero heat dissipation attribute. Quantum Dot Cellular Automata (QCA) has adopted the concept of reversibility and emerged as a primitive tool for quantum architecture deigns with clocking near Terra-Hertz range. A plethora of quantum architectures based on QCA cells have been proposed till date. With rise of research on digital designs based on QCA, multiple literary proposals exist which realize digital designs incorporating QCA cells. This communication proposes a Hamming Code Generator-Checker architecture design using 4-dot-2-electron QCA cells. We employ an existing QCA based XOR gate literary proposal for designing the proposed architecture. Peer comparison with literary counterparts has proven our design to fare better with a gain of 60.6% in area.

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