A ReRAM integrated 7T2R non-volatile SRAM for normally-off computing application

Abstract

This study demonstrates a new 7T2R nonvolatile SRAM (nvSRAM) with 3D ReRAM stacked structure for normally-off computing application. With this structure, the fully performance of SRAM can work well in active mode, and reduce the leakage current in power-off mode. High performance HfOx based ReRAM is used for high speed storage element and exhibits an instant-on characteristic. The present 7T2R nvSRAM cell includes a 1T2R RRAM (1 transistor/2 resistive memory) cell and a 6T SRAM circuit, which is low area penalty and achieve the nvSRAM function. The write margin is improved over 1.03x and 1.37x larger than that of 6T SRAM and 6T2R nvSRAM. The access time and read/write power consumption in 7T2R nvSRAM is better than that of 8T2R structure. Finally, a 16 Kb macro was fabricated with a 0.18 μm TSMC FEOL and ITRI BEOL. According to the measurement result, the VDD min can be low down to 0.7 V and access time can be fast as 8.3 ns without pad delay. The data storage time is only 10 ns for SET and RESET in the ReRAM cell.

A RRAM Integrated 4T SRAM with Self-Inhibit Resistive Switching Load by Pure CMOS Logic Process

“…This feature can great enhance its applications and flexibility in various non-volatile memory IP modules needed in many IC systems. In addition, the proposed 4T2R nv-SRAM features much smaller parasitic capacitance comparing to other previously reported nv-SRAMs [ 29 – 31 ] which require back-end-of-line (BEOL) non-volatile components. In order to connect the Q and QB node from the surface of Si to these BEOL RRAM or MRAMs, multiple stacks of metal and via layers are needed.…”

“…Furthermore, it is independent of the number of metal layers adapted in a particular circuit. To further investigate the effect of parasitic capacitance of the SRAM speed, simulated dynamical response of the SRAM cells proposed in [ 29 – 31 ] and this work are compared in Fig. 12 .…”

Ambient energy harvesting nonvolatile processors

“…Previous work adopted various types of emerging memory devices, such as FeRAM, STT-MRAM (MTJ), PCRAM, and RRAM (memristor) in nvSRAM cells [9,10,7,11,12,13,14,15]. The 4T2R and 7T2R nvSRAMs [9,11,12,14] achieve small cell area at the expense of significant DC-short current at storage nodes (Q and QB).…”

“…The 4T2R and 7T2R nvSRAMs [9,11,12,14] achieve small cell area at the expense of significant DC-short current at storage nodes (Q and QB). To cut off this DC-short current at storage nodes, extra transistors are required at the expense of larger cell area for nvSRAMs [7,13,15].…”

Non-volatile SRAM memory cells based on ReRAM technology

“…In [31], and Chiu's 8T2R cell [32]. WRITE and READ operations in the memory cells are accomplished through the bit lines.…”