A reliable and efficient modified T‐type fault tolerant five level inverter configuration

Abstract

Summary This paper presents a new fault‐tolerant multilevel inverter (FTMLI) configuration, which can withstand both the single‐switch and multi‐switch faults by maintaining rated voltage and power. A new control algorithm is developed to compensate the switch fault, with the generation of appropriate control signals to the corresponding switches. Sine‐carrier level‐shifted pulse width modulation is used to generate control signals to the switches. The detailed loss analysis for all the switches is performed by considering variations in the junction temperature. It helps in the efficient design of heat sinks for the switches. The comparative analysis is performed for the proposed topology with existing topologies in terms of reliability, efficiency, and mean time to failure. The proposed topology is simulated in MATLAB/Simulink platform and these results are validated through a laboratory prototype. The performance of the proposed FTMLI topology is found satisfactory.