2016
DOI: 10.1007/978-3-319-30481-6_10
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A Redundant Design Approach with Diversity of FPGA Resource Mapping

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Cited by 3 publications
(4 citation statements)
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“…For the duplex redundant design, a large number of errors were overlooked in the homogeneous redundant designs DSP-DSP and LUT-LUT. This 5a) is almost consistent with the evaluation results for simple circuits described in RTL [2,13]. We also evaluated homogeneous TMR, which is commonly used for today's practical systems.…”
Section: Resultssupporting
confidence: 86%
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“…For the duplex redundant design, a large number of errors were overlooked in the homogeneous redundant designs DSP-DSP and LUT-LUT. This 5a) is almost consistent with the evaluation results for simple circuits described in RTL [2,13]. We also evaluated homogeneous TMR, which is commonly used for today's practical systems.…”
Section: Resultssupporting
confidence: 86%
“…A design flow of FPGA circuits consists of logic synthesis of design description, technology mapping, place and route, and generation of configuration data. The authors of [1,2,13] have proposed a heterogeneous redundant design method focusing on the diversity in the technology mapping process. In the technology mapping process, in which FPGA resources are assigned to the netlist generated by logic synthesis, the diversity can be introduced depending on a design strategy.…”
Section: Methodsmentioning
confidence: 99%
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