A reconfigurable RF sampling receiver for multistandard applications

Latiri, Anis; Joet, Loic; Desgreys, Patricia; Loumeau, Patrick

doi:10.1016/j.crhy.2006.07.007

Cited by 14 publications

(9 citation statements)

References 11 publications

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“…The extremely simple filter structures suitable for passive charge-domain signal processing are so-called all-pole IIR filters and running-sum FIR filters [2], [3], [6], [14].…”

Section: Decimation Filter Implementationmentioning

confidence: 99%

“…Analog discrete-time switched-capacitor filters based on deep-submicrometer CMOS technology have recently become popular in RF radio front-end designs due to their excellent RF performance, low power consumption, and a high level of integration [2]- [5]. The fact that the switched-capacitor filters can be made digitally reconfigurable makes RF sampling very appealing in terms of building multi-standard radio [1], [6]. Furthermore, since the transistors are used as switches their nonlinearities become less important and less susceptible to process scaling.…”

Section: Introductionmentioning

confidence: 99%

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Multirate Charge-Domain Filter Design for RF-Sampling Multi-Standard Receiver

Yli‐Kaakinen

Lehtinen

Renfors

2015

IEEE Trans. Circuits Syst. I

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This paper proposes a reconfigurable decimator architecture for a multi-standard receiver front-end. This architecture is based on direct radio-frequency bandpass sampling and analog discrete-time multirate signal processing. The overall front-end consists of a low-noise amplifier followed by a tunable charge-domain sampler, a reconfigurable decimator, and an analog-to-digital converter. The proposed decimator is constructed as a cascade of four switched-capacitor filtering stages. The frequency responses and the decimation factors of these stages are digitally controllable thus enabling high reconfigurability. The advantages of the proposed design are a high image rejection, a low overall implementation complexity, and high flexibility. The feasibility of the design is evaluated by computer simulations.

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“…The extremely simple filter structures suitable for passive charge-domain signal processing are so-called all-pole IIR filters and running-sum FIR filters [2], [3], [6], [14].…”

Section: Decimation Filter Implementationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Multirate Charge-Domain Filter Design for RF-Sampling Multi-Standard Receiver

Yli‐Kaakinen

Lehtinen

Renfors

2015

IEEE Trans. Circuits Syst. I

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“…However, in the most cases, the analog to digital conversion process is accomplished with intermediate or baseband frequency. In [3], a discrete time analog signal processing blocks are inserted before the ADC in order to relax its requirements. However, this architecture include an important number of blocks before the ADC.…”

Section: Introductionmentioning

confidence: 99%

On the RF subsampling continuous-time ΣΔ downconversion stage for multistandard receivers

Bechir¹,

Bouallègue²

2010

2010 2nd International Conference on Computer Engineering and Technology

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This paper deals with the design and analysis of a new RF subsampling downconversion front-end assigned to propose a multistandard receivers for next wireless generation standards. The RF subsampling front-end is based on continuous time (CT) bandpass ΣΔ modulator with sine-shaped feedback DAC. Much attention is given to frequency sampling selection and non idealities in subsampling CT-bandpass ΣΔ modulator. Thus, the mainly jitter effect on SNR degradation is investigated. Simulation results for a dual-mode GSM and WCDMA receiver based on RF subsampling fourth order CT-bandpass ΣΔ modulator show that the proposed topology can improve the SNR output measurement with low sampling rate.

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“…The bandpass charge sampling (BCS) filter [4] (also called bandpass integration sampler [5]) provides the abovementioned requirements for the design of a digital enhanced receiver: BCS are simple (only switches and capacitors), CMOS integrable [6], and robust to nonidealities such as clock jitter [5]). The input waveform is integrated over a fixed time window, and the resulting integral is taken as a sample.…”

Section: Bandpass Charge Samplingmentioning

confidence: 99%

Wide-band multipath A to D converter for cognitive radio applications

Gruget

Roger

Nguyen

et al. 2010

2010 IEEE International Microwave Workshop Series on RF Front-Ends for Software Defined and Cognitive Radio Solutions (IMWS)

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-This article presents a digital-enhanced radio frequency receiver for fast wide-band spectrum sensing. It is based on charge sampling and hybrid filter bank techniques. The charge sampling method is employed to design analog bandpass filters. Using a hybrid filter bank for wide-band analog-to-digital conversion improves the speed and resolution of the conversion. We propose to use these techniques in combination of frequencydivision multiplexing with time-division multiplexing to design an integrated, completely software reconfigurable and reliable backend of radio frequency receiver for cognitive radio applications.

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A reconfigurable RF sampling receiver for multistandard applications

Cited by 14 publications

References 11 publications

Multirate Charge-Domain Filter Design for RF-Sampling Multi-Standard Receiver

Multirate Charge-Domain Filter Design for RF-Sampling Multi-Standard Receiver

On the RF subsampling continuous-time ΣΔ downconversion stage for multistandard receivers

Wide-band multipath A to D converter for cognitive radio applications

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