2014
DOI: 10.1007/s11265-014-0870-7
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A Real-time Scalable Object Detection System using Low-power HOG Accelerator VLSI

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Cited by 13 publications
(10 citation statements)
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“…Both accelerators process full HD videos at 30fps in real-time. The architecture in [11] has two classification engines similar to this work, but it does not have on-chip pyramid generation to support multi-scale and does not detect deformable parts. The two classifiers in [11] can be used to detect two different object classes at a single scale, or support multi-scale detection by processing a 5-level pyramid generated and packed off-chip into two full HD frames.…”
Section: B Evaluation Resultsmentioning
confidence: 99%
See 2 more Smart Citations
“…Both accelerators process full HD videos at 30fps in real-time. The architecture in [11] has two classification engines similar to this work, but it does not have on-chip pyramid generation to support multi-scale and does not detect deformable parts. The two classifiers in [11] can be used to detect two different object classes at a single scale, or support multi-scale detection by processing a 5-level pyramid generated and packed off-chip into two full HD frames.…”
Section: B Evaluation Resultsmentioning
confidence: 99%
“…The architecture in [11] has two classification engines similar to this work, but it does not have on-chip pyramid generation to support multi-scale and does not detect deformable parts. The two classifiers in [11] can be used to detect two different object classes at a single scale, or support multi-scale detection by processing a 5-level pyramid generated and packed off-chip into two full HD frames. Our proposed architecture supports multi-scale generation and detection on-chip and detects deformable parts, which both increase the detection accuracy and robustness, while consuming 30% less energy/pixel compared to [11].…”
Section: B Evaluation Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…6 also shows the chip output with multi-object detection (cars and pedestrians). Comparing to the detector accelerator in [6], our chip boosts the detection accuracy with multi-scale and detecting 8 deformable parts per object while consuming 30% less energy per pixel.…”
Section: Introductionmentioning
confidence: 99%
“…A widely-used technique is the integral image method [18], which provides the possibility of obtaining area-based descriptor values in a constant time. Hardware implementations, such as the feature extraction accelerator VLSI [19], can be used in portable, on-board vehicle systems or sensor networks; hardware accelerators can also increase the efficiency of computer-based solutions. However, not all algorithms can be efficiently implemented in hardware, therefore the researchers are searching for pipeline-friendly methods, which can be embedded into the vision chips [20].…”
Section: Introductionmentioning
confidence: 99%