A real-time program trace compressor utilizing double move-to-front method

Milenković³

et al. 2014

IEEE Trans. Comput.

Self Cite

Abstract-Unobtrusive capturing of program execution traces in real-time is crucial for debugging many embedded systems. However, tracing even limited program segments is often cost-prohibitive, requiring wide trace ports and large on-chip trace buffers. This paper introduces a new cost-effective technique for capturing and compressing program execution traces on-thefly. It relies on branch predictor-like structures in the trace module and corresponding software modules in the debugger to significantly reduce the number of events that need to be streamed out of the target system. Coupled with an effective variable encoding scheme that adapts to changing program patterns, our technique requires merely 0.029 bits per instruction of trace port bandwidth, providing a 34-fold improvement over the commercial state-of-the-art and a five-fold improvement over academic proposals, at the low cost of under 5,000 logic gates.

Section: Path Informationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Using Branch Predictors and Variable Encoding for On-the-Fly Program Tracing

Uzelac¹,

Milenković³

et al. 2014

IEEE Trans. Comput.

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“…Some of these techniques rely on hardware implementations of general-purpose compressors, such as LZ [8] or double-move-to-front [9]. Although they significantly reduce the size of the trace that needs to be streamed out, they have a relatively high complexity (50,000 gates and 24,600 gates, respectively).…”

Section: Introductionmentioning

confidence: 99%

mcfTRaptor: Toward unobtrusive on-the-fly control-flow tracing in multicores

Tewar

Myers

Journal of Systems Architecture

2015

a b s t r a c tSoftware testing and debugging has become the most critical aspect of the development of modern embedded systems, mainly driven by growing software and hardware complexity, increasing integration, and tightening time-to-market deadlines. Software developers increasingly rely on on-chip trace and debug infrastructure to locate software bugs faster. However, the existing infrastructure offers limited visibility or relies on hefty on-chip buffers and wide trace ports that significantly increase system cost. This paper introduces a new technique called mcfTRaptor for capturing and compressing functional and time-stamped control-flow traces on-the-fly in modern multicore systems. It relies on private on-chip predictor structures and corresponding software modules in the debugger to significantly reduce the number of events that needs to be streamed out of the target platform. Our experimental evaluation explores the effectiveness of mcfTRaptor as a function of the number of cores, encoding mechanisms, and predictor configurations. When compared to the Nexus-like control-flow tracing, mcfTRaptor reduces the trace port bandwidth in the range from 14 to 23.8 times for functional traces and 10.8-18.6 times for time-stamped traces.

“…Several proposals address reduction of trace messages captured on SOCs buses, but they provide fairly limited compression ratios [11]. Whereas several academic proposals have addressed real-time hardware-based compression of program execution traces [12][13][14], the more challenging problem of realtime hardware-based reduction of data address and value traces has not been directly addressed so far.…”

Section: Introductionmentioning

confidence: 99%

Hardware-based data value and address trace filtering techniques

Uzelac¹,

Proceedings of the 2010 International Conference on Compilers, Architectures and Synthesis for Embedded Systems

2010

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Capturing program and data traces during program execution unobtrusively in real-time is crucial in debugging and testing of cyber-physical systems. However, tracing a complete program unobtrusively is often cost-prohibitive, requiring large on-chip trace buffers and wide trace ports. Whereas program execution traces can be efficiently compressed in hardware, compression of data address and data value traces is much more challenging due to limited redundancy. In this paper we describe two hardwarebased filtering techniques for data traces: cache first-access tracking for load data values and data address filtering using partial register-file replay. The results of our experimental analysis indicate that the proposed filtering techniques can significantly reduce the size of the data traces (~5-20 times for the load data value trace, depending on the data cache size; and ~5 times for the data address trace) at the cost of rather small hardware structures in the trace module.