A Quasi-Four-Pair Class-E CMOS RF Power Amplifier With an Integrated Passive Device Transformer

Lee, Hongtak; Park, Changkun; Hong, Songcheol

doi:10.1109/tmtt.2009.2015122

Cited by 36 publications

(6 citation statements)

References 13 publications

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“…As a result, it makes difficult to miniaturizing them using a thin film process. 5) Another principle CMFs which are constructed with not the series high impedance by magnetic coupling of two coils but a shunt circuit to release the common mode noise into the circuit ground (GND) are developed, [6][7][8][9][10][11][12][13] These CMFs have a strong attenuation peak at the particular frequency with the narrow bandwidth, therefore they cannot remove the wideband noise nor the skew of random pulse data between differential transmission lines.…”

Section: Introductionmentioning

confidence: 99%

Compact differential signal balancer embedded in metal wiring layers of silicon LSI for common mode noise filtering

Kameya¹,

Chang²,

Gofuku³

et al. 2020

Jpn. J. Appl. Phys.

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The differential signal balancer (DSB) is a discrete common mode filter component using a low temperature co-fired ceramic (LTCC) process in which non-magnetic materials are employed. In this paper, we have developed the new DSB embedded in metal wiring layers of silicon LSI for achieving the multiple ultra-high-speed differential transmission exceeding 10 Gb s−1 between LSIs. While the spiral inductors in the silicon CMOS process are affected by the substrate loss and conductor resistance with the thinner thicknesses for both metal and dielectric layers, its lumped circuit parameters are optimized well, and the obtained characteristics are almost comparable with that of the conventional DSB using LTCC. It has approximately −10 dB attenuation of common mode noise at 2.4 GHz with very small size of 120 μm × 250 μm and volume size of about 1/6000 compared to the conventional DSB.

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Section: Introductionmentioning

confidence: 99%

Compact differential signal balancer embedded in metal wiring layers of silicon LSI for common mode noise filtering

Kameya¹,

Chang²,

Gofuku³

et al. 2020

Jpn. J. Appl. Phys.

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“…Based on this DAT, much research has sought to maximize the efficiency of CMOS PAs [2]- [5]. Some earlier works have proposed successful power stage structures that are optimized for the DAT structure [6]- [8]. Other valuable attempts to minimize current consumption in the power stage have adapted an envelope tracking (ET) technique to CMOS PAs [8]- [12].…”

Section: Introductionmentioning

confidence: 99%

A Current-Shared Cascade Structure With an Auxiliary Power Regulator for Switching Mode RF Power Amplifiers

Hwang¹,

Lee²,

Park³

et al. 2014

IEEE Trans. Microwave Theory Techn.

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In this study, we propose an auxiliary power regulator (APR) for the current-shared cascade (CSC) structure of the driver stages of RF CMOS power. Although the CSC structure provides a method to reduce the power consumption at the driver stages of a differential power amplifier (PA), it is difficult to obtain optimum levels of effective supply voltage for the first and second driver stages. Additionally, the transistor sizes of the first and second driver stages of the CSC structure must be identical to ensure the proper operation of the PA. Thus, in this work, we propose an APR structure that ensures the proper operation of a PA with different transistor sizes in its first and second driver stages. To prove the feasibility of the proposed technique, we designed the PA with a CSC structure using an APR. From the measured results, we successfully verify the feasibility of the proposed structure. Additionally, we provide experimental results for a typical CMOS PA to determine the optimum supply voltage for the second driver stage.

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“…Unlike other research that has implemented PCBs or different substrates, using the glass IPD technology can effectively improve the circuit area without affecting circuit performance. The most important outcome is that a full differential bandpass filter using glass IPD technology is easily integrated with SiP applications [26][27][28][29][30] and enhances system design flexibility.…”

Section: Introductionmentioning

confidence: 99%

Very Compact Full Differential Bandpass Filter With Transformer Integrated Using Integrated Passive Device Technology

Wu¹,

Kuo²,

Chen³

2011

PIER

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Abstract-In this study, a very compact, second-order, full differential bandpass filter is presented. To achieve compact circuit area and system-in-package (SiP) applications, the transformer structure is integrated using integrated passive device (IPD) technology on a glass substrate. The coupled resonator synthesis method is used to achieve the bandpass filter design and suitably adjust the tapped feed-lines to obtain good impedance match at all ports. The area (1.27 mm×1.27 mm) of the bandpass filter is effectively reduced, and the performance, as measured by insertion loss (2.5 dB) and CMRR (> 30 dB), is still acceptable with such a compact area. Most importantly, this full differential bandpass filter is also suitable for SiP applications, as other studies implemented using glass IPD technology have demonstrated.

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A Quasi-Four-Pair Class-E CMOS RF Power Amplifier With an Integrated Passive Device Transformer

Cited by 36 publications

References 13 publications

Compact differential signal balancer embedded in metal wiring layers of silicon LSI for common mode noise filtering

Compact differential signal balancer embedded in metal wiring layers of silicon LSI for common mode noise filtering

A Current-Shared Cascade Structure With an Auxiliary Power Regulator for Switching Mode RF Power Amplifiers

Very Compact Full Differential Bandpass Filter With Transformer Integrated Using Integrated Passive Device Technology

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