A quantitative evaluation of cache types for high-performance computer systems

Time stamp invalidation of TLB-unified cache and its performance evaluation

“…In the architecture using the virtual address mechanism, the addresses used in the processor and the main memory are not identical in general [11]. Figure 1 shows the general configuration and address translation mechanism of the VV (virtually-indexed virtually-addressed) cache.…”

Performance of One's Complement Caches

“…Depending on whether physical address or virtual address are used for index and tag, there are four different types of caches. A good discussion of various cache types and their advantages and disadvantages can be found in [10]. If the cache is physically addressed, the address calculation will be done after the address translation.…”

Reducing TLB power requirements

“…This method cannot be applied easily to data or unified caches due to coherence problems for shared data [12]. Therefore, most data caches are physically tagged and require an access to the TLB for every cache access.…”