A Pulse Frequency Modulation VCO-ADC in 40 nm

Gutierrez, Eric; Pérez, Carlos; Hernández, Luis; Cardes, Fernando; Petrescu, V.; Walter, Sergio; Gaier, Ulrich

doi:10.1109/tcsii.2018.2837757

Cited by 10 publications

(7 citation statements)

References 14 publications

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“…In this paper, we propose a different approach based on a high-rate sampler that interpolates samples between two clock edges and implements an analog finite-impulse-response (FIR) decimator. This system can be better explained using the pulse frequency modulation (PFM) approach introduced in [24,25]. In Figure 3a, signal v(t) is passed through a PFM modulator composed of a VCO, an edge detector block, and a pulse-shaping filter h(t).…”

Section: System Level Architecturementioning

confidence: 99%

“…In Figure 3a, signal v(t) is passed through a PFM modulator composed of a VCO, an edge detector block, and a pulse-shaping filter h(t). According to [25], the PFM modulator behaves like a signal coder, whose output spectrum reproduces the input signal together with some modulation components M(s) (Figure 3c). For band-limited signals, M(s) lie at frequencies much higher than the input signal.…”

Section: System Level Architecturementioning

confidence: 99%

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A VCO-Based CMOS Readout Circuit for Capacitive MEMS Microphones

Quintero

Cardes

Pérez

et al. 2019

Sensors

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Microelectromechanical systems (MEMS) microphone sensors have significantly improved in the past years, while the readout electronic is mainly implemented using switched-capacitor technology. The development of new battery powered “always-on” applications increasingly requires a low power consumption. In this paper, we show a new readout circuit approach which is based on a mostly digital Sigma Delta (sans-serifΣΔ) analog-to-digital converter (ADC). The operating principle of the readout circuit consists of coupling the MEMS sensor to an impedance converter that modulates the frequency of a stacked-ring oscillator—a new voltage-controlled oscillator (VCO) circuit featuring a good trade-off between phase noise and power consumption. The frequency coded signal is then sampled and converted into a noise-shaped digital sequence by a time-to-digital converter (TDC). A time-efficient design methodology has been used to optimize the sensitivity of the oscillator combined with the phase noise induced by 1/f and thermal noise. The circuit has been prototyped in a 130 nm CMOS process and directly bonded to a standard MEMS microphone. The proposed VCO-based analog-to-digital converter (VCO-ADC) has been characterized electrically and acoustically. The peak signal-to-noise and distortion ratio (SNDR) obtained from measurements is 77.9 dB-A and the dynamic range (DR) is 100 dB-A. The current consumption is 750 μA at 1.8 V and the effective area is 0.12 mm2. This new readout circuit may represent an enabling advance for low-cost digital MEMS microphones.

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Section: System Level Architecturementioning

confidence: 99%

Section: System Level Architecturementioning

confidence: 99%

A VCO-Based CMOS Readout Circuit for Capacitive MEMS Microphones

Quintero

Cardes

Pérez

et al. 2019

Sensors

Self Cite

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“…In practical implementations, at very low bandwidths, which is the case for sensor interface applications, the system performance is limited by the oscillator phase noise 4 . It is, therefore, interesting to compare the performance of these two time-based architectures under this condition.…”

Section: B Snr and Phase Noisementioning

confidence: 99%

“…In [2] and [3], the oscillators are used as a frequency modulator, resulting in a Σ∆ modulator with no need for DACs due to the open-loop architecture. Two different analyses of such open-loop VCO-based ADC are presented in [4] and [5], emphasizing its similarity with pulse frequency modulators and Σ∆ modulators, respectively. However, in such open-loop systems the poor VCO linearity limits the overall system SNDR.…”

Section: Introductionmentioning

confidence: 99%

Performance Limitation Analysis of Highly-Digital Time-Based Closed-Loop Sensor-to-Digital Converter Architectures

Sacco

Marin

Vergauwen

et al. 2019

IEEE Trans. Circuits Syst. II

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This paper presents the theoretical and comparative analysis of two major time-based architectures for sensor interfaces. Both use a voltage-controlled oscillator (VCO) to achieve a highly-digital scalable implementation. The first architecture is based on a phase-locked loop, while the second one is countbased. Both systems are closed loop to efficiently mitigate the VCO nonlinearity. They show inherent first-order quantization noise shaping thanks to the use of an oscillator and phase detection. The two systems having a different working principle leads to different VCO requirements in terms of gain linearity (V-to-f or V-toT linearity). Formulas are derived to predict the maximum SQNR for both architectures. Equations for the achievable maximum SNR taking into account the VCO phase noise are also derived, since this is the limit to the SNR in practical implementations. State-variable-based simulation results are presented, confirming the theoretical analysis and emphasizing the different design trade-offs and practical considerations.

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“…Diverse hybrid structures with VCOs have been published: with VCOs as integrators/quantizers in CTSDMs [19][20][21][22][23], placing it into SAR-based structures for pipeline ADCs [24][25][26][27] or in multi-stage noise shaping (MASH) architectures [28][29][30][31]. If we look for simplicity, they are of special interest if a ring-oscillator is used in an open-loop configuration [32][33][34]. Apart from its simple digital architecture, composed of CMOS logic gates (NOT gates), the spectral properties of pulse frequency modulation enable first-order noise-shaped output data, with a performance similar to CTSDMs [35].…”

Section: Introductionmentioning

confidence: 99%

Ring-Oscillator with Multiple Transconductors for Linear Analog-to-Digital Conversion

et al. 2021

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This paper proposes a new circuit-based approach to mitigate nonlinearity in open-loop ring-oscillator-based analog-to-digital converters (ADCs). The approach consists of driving a current-controlled oscillator (CCO) with several transconductors connected in parallel with different bias conditions. The current injected into the oscillator can then be properly sized to linearize the oscillator, performing the inverse current-to-frequency function. To evaluate the approach, a circuit example has been designed in a 65-nm CMOS process, leading to a more than 3-ENOB enhancement in simulation for a high-swing differential input voltage signal of 800-mVpp, with considerable less complex design and lower power and expected area in comparison to state-of-the-art circuit based solutions. The architecture has also been checked against PVT and mismatch variations, proving to be highly robust, requiring only very simple calibration techniques. The solution is especially suitable for high-bandwidth (tens of MHz) medium-resolution applications (10–12 ENOBs), such as 5G or Internet-of-Things (IoT) devices.

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A Pulse Frequency Modulation VCO-ADC in 40 nm

Cited by 10 publications

References 14 publications

A VCO-Based CMOS Readout Circuit for Capacitive MEMS Microphones

A VCO-Based CMOS Readout Circuit for Capacitive MEMS Microphones

Performance Limitation Analysis of Highly-Digital Time-Based Closed-Loop Sensor-to-Digital Converter Architectures

Ring-Oscillator with Multiple Transconductors for Linear Analog-to-Digital Conversion

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