A Program for Device Model Parameter Extraction from Gate Capacitance and Current of Ultrathin$hboxSiO_2$and High-$kappa$Gate Stacks

Li, Fēi; Register, Leonard F.; Hasan, Mohammad M.; Banerjee, Siddhartha

doi:10.1109/ted.2006.880373

Cited by 5 publications

(3 citation statements)

References 26 publications

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“…Studies shown in [S, 6,12] are able to know the parameter extracting from split C-V to real MOSFET, e.g. mobility, doping profile, flat-band voltage (V tb ) , channel length, interface state density and so on [12][13][14][15][16]. The C-V application to failure analysis (FA) is introduced on the detection for poor gate conduction with high-resistance in the path.…”

Section: The Experiments and Discussionmentioning

confidence: 99%

The approaching of capacitance-voltage measurement toward real-world nano-device

Lai

Zhang

2015

2015 China Semiconductor Technology International Conference

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Owing to the advancing development of electrical technique in analytical laboratory, we already have capability to measure tiny capacitance, down to 100aF, in Nano-dimension, down to 20nm, of the real-world Nano-device using Nanoprobing in SEM or AFM instead of traditional Micro-probing in OM instrument become real of the claim. The mechanism, operation and application are described and discussed in the content.

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Section: The Experiments and Discussionmentioning

confidence: 99%

The approaching of capacitance-voltage measurement toward real-world nano-device

Lai

Zhang

2015

2015 China Semiconductor Technology International Conference

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“…The induced gate-charge is given by ox ox tot F Q and the capacitance is then obtained using Eq. [12] and…”

Section: Description Of the C G -V G Compact Modelmentioning

confidence: 99%

“…Parameter extraction from measured C g -V g and I g -V g data, required for device characterization and circuit simulation, also becomes correspondingly more complicated with scaling. To this end we have combined the above models with a non-linear least-square fitting program with modified Levenberg-Marquardt (LM) algorithm (11) for efficient and accurate extraction of device parameters (12). As compared to existing parameter extraction programs such as (13), our program provides comparable speed while addressing additional physics for small EOTs.…”

Section: Introductionmentioning

confidence: 99%

Efficient Gate Capacitance and Current Modeling of High-k Gate Stacks

Hasan

et al. 2007

ECS Trans.

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Computationally efficient and accurate physically-based selfconsistent compact models of CMOS gate-capacitance (C g -V g ) and gate-current (I g -V g ) for both ultra-thin SiO 2 and high-gate-stacks down to ~ 0.5 nm EOT are reviewed. The compact model produces results comparable to those obtained via computationally intense simulators. A modified Levenberg-Marquardt algorithm has been used in combination with these models to provide an efficient material and device parameter extraction capability. In a few seconds, parameters such as effective oxide thickness, surface substrate doping concentrations, flat-band voltages and poly-Si doping concentrations can be obtained from measured C g -V g , and physical thicknesses, band offsets, dielectric constants and tunneling masses for the gate-dielectrics can be extracted from measured I g -V g .

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Applications of the pulsed current-voltage (I-V) and capacitance-voltage (C-V) techniques for high-resistive gates in MOSFETs

Lai

2016

Microelectronics Reliability

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A Program for Device Model Parameter Extraction from Gate Capacitance and Current of Ultrathin$hboxSiO_2$and High-$kappa$Gate Stacks

Cited by 5 publications

References 26 publications

The approaching of capacitance-voltage measurement toward real-world nano-device

The approaching of capacitance-voltage measurement toward real-world nano-device

Efficient Gate Capacitance and Current Modeling of High-k Gate Stacks

Applications of the pulsed current-voltage (I-V) and capacitance-voltage (C-V) techniques for high-resistive gates in MOSFETs

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